W83877 Winbond Electronics Corp America, W83877 Datasheet - Page 90

• Manufacturer Part Number: W83877
• Description: Winbond I/O
• Manufacturer: Winbond Electronics Corp America

When the device is in Extended Function mode and EFIR is 14H, the CR14 register can be accessed
through EFDR. The bit definitions are as follows:
GIOP0MD2-GIOP0MD0 (bit 7-bit 5): GIOP0 pin mode selection
GIO0CSH(bit 4):
GCS0IOR (bit 3): See below.
GIOP0MD2
0
1
0
0
0
0
1
the Chip Select pin will be active LOW when (AEN = L) AND (SA10-0 = GIO0AD10-
0) OR (NIOR = L) OR (NIOW = L)
the Chip Select pin will be active HIGH when (AEN = L) AND (SA10-0 = GIO0AD10-
0) OR (NIOR = L) OR (NIOW = L)
GIOP0MD1
X
0
0
1
1
7
GIOP0MD0
6
X
0
1
0
1
5
4
inactive (tri-state)
as a data output pin (SD0 GIOP0), when (AEN = L)
AND (NIOW = L) AND (SA10-0 = GIO0AD10-0), the
value of SD0 will be present on GIOP0
as a data input pin (GIOP0 SD0), when (AEN = L)
AND (NIOR = L) AND (SA10-0 = GIO0AD10-0), the
value of GIOP0 will be present on SD0
as a data input/output pin (GIOP0 SD0).
When (AEN = L) AND (NIOW = L) AND (SA10-0 =
GIO0AD10-0), the value of SD0 will be present on
GIOP0 When (AEN = L) AND (NIOR = L) AND (SA10-
0 = GIO0AD10-0), the value of GIOP0 will be present
on SD0
as a Chip Select pin, the pin will be active at (AEN =
L) AND (SA10-0 = GIO0AD10-0) OR (NIOR = L) OR
(NIOW = L)
3
- 90 -
2
1
0
GDA0IPI
GDA0OPI
GCS0IOW
GCS0IOR
GIO0CSH
GIOP0MD0
GIOP0MD1
GIOP0MD2
GIOP0 pin
W83877F