W83877 Winbond Electronics Corp America, W83877 Datasheet - Page 37

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W83877

Manufacturer Part Number
W83877
Description
Winbond I/O
Manufacturer
Winbond Electronics Corp America
Datasheet

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DRATE1 DRATE0 (Bit 1, 0):
These two bits select the data rate of the FDC and reduced write current control.
00 500 KB/S (MFM), 250 KB/S (FM), RWC = 1.
01 300 KB/S (MFM), 150 KB/S (FM), RWC = 0.
10 250 KB/S (MFM), 125 KB/S (FM), RWC = 0.
11 1 MB/S (MFM), Illegal (FM), RWC = 1.
2.2.7 FIFO Register (R/W base address + 5)
The Data Register consists of four status registers in a stack with only one register presented to the
data bus at a time. This register stores data, commands, and parameters and provides diskette-drive
status information. Data bytes are passed through the data register to program or obtain results after
a command. In the W83877F, this register defaults to FIFO disabled mode after reset. The FIFO can
change its value and enable its operation through the CONFIGURE command.
PRECOM
DATA RATE
2
0
0
0
0
1
1
1
1
250 KB/S
300 KB/S
500 KB/S
1 MB/S
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
DEFAULT PRECOMPENSATION DELAYS
PRECOMPENSATION DELAY
- 37 -
0.00 nS (disabled)
Default Delays
125.00 nS
166.67 nS
208.33 nS
250.00 nS
41.67 nS
83.34 nS
41.67 nS
125 nS
125 nS
125 nS
Publication Release Date: January 1996
W83877F
Revision A2

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