W83877 Winbond Electronics Corp America, W83877 Datasheet - Page 84

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W83877

Manufacturer Part Number
W83877
Description
Winbond I/O
Manufacturer
Winbond Electronics Corp America
Datasheet

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MFM (Bit 2):
This bit and IDENT select one of the three interface modes (PS/2 mode, Model 30, or PC/AT mode).
INTVERTZ (Bit 1):
This bit determines the polarity of all FDD interface signals.
When this bit is a logic 0, indicates a second drive is installed and is reflected in status register A.
8.2.13 Configuration Register C (CR0C), default = 28H
When the device is in Extended Function mode and EFIR is 0CH, the CR0C register can be accessed
through EFDR. The bit definitions are as follows:
TURA (bit 7):
TURB (bit 6):
DRV2EN (Bit 0): PS/2 mode only
0
1
0
1
0
1
0
0
1
1
the clock source of UART A is 24 MHz, it can make the baudrate of UART A up to 1.5
MHz
the clock source of UART B is 24 MHz, it can make the baudrate of UART A up to 1.5
MHz
FDD interface signals are active low
FDD interface signals are active high
the clock source of UART A is 1.8462 MHZ (24 MHz divide 13) (default)
the clock source of UART B is 1.8462 MHz (24 MHz divide 13) (default)
0
1
0
1
7
6
5
4
Model 30 mode
PS/2 mode
AT mode
AT mode
3
- 84 -
2
1
0
TX2INV
RX2INV
Reserved
URIRSEL
Reserved
HEFERE
TURB
TURA
W83877F

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