W83877 Winbond Electronics Corp America, W83877 Datasheet - Page 69

• Manufacturer Part Number: W83877
• Description: Winbond I/O
• Manufacturer: Winbond Electronics Corp America

There are two one-shot timers (556) inside the W83877F for use with the joystick.
6.0 Game Port Decoder
The W83877F provides GMRD and GMWR pins that decode game port address as specified in CR1E
and I/O read/write commands.
If the host issues IOR and the specified address, the GMRD
specified address, the GMWR pin is low active.
7.0 Plug and Play Configuration
A powerful new plug-and-play function has been built into the W83877F to help simplify the task of
setting up a computer environment. With appropriate support from BIOS manufacturers, the system
designer can freely allocate Winbond I/O devices (i.e., the FDC, PRT, UART, IDE, and game port) in
the PC's I/O space (100H - 3FFH). In addition, the W83877F also provides 8 interrupt requests and 3
DMA pairs for designers to assign in interfacing FDCs, UARTs, and PRTs. Hence this powerful I/O
chip offers greater flexibility for system designers.
The PnP feature is implemented through a set of Extended Function Registers (CR1E and CR20 to
29). Details on configuring these registers are given in Section 8. The default values of these PnP-
related registers set the system to a configuration compatible with environments designed with
previous Winbond I/O chips.
8.0 Extended Function Registers
The W83877F provides many configuration registers for setting up different types of configurations.
After power-on reset, the state of the hardware setting of each pin will be latched by the relevant
configuration register to allow the W83877F to enter the proper operating configuration. To protect
the chip from invalid reads or writes, the configuration registers cannot be accessed by the user.
There are four ways to enable the configuration registers to be read or written. HEFERE (CR0C bit 5)
and HEFRAS (CR16 bit 0) can be used to select one out of these four methods of entering the
Extended Function mode as follows:
First, a specific value must be written once (88H/89H) or twice (86H/87H) to the Extended Functions
Enable Register (I/O port address 250H or 3F0H). Second, an index value (00H-17H, 1EH, 20H-29H)
must be written to the Extended Functions Index Register (I/O port address 251H or 3F0H) to identify
which configuration register is to be accessed. The designer can then access the desired
configuration register through the Extended Functions Data Register (I/O port address 252H or 3F1H).
HEFRAS
0
0
1
1
HEFERE
0
1
0
1
write 88H to the location 250H
write 89H to the location 250H (power-on default)
write 86H to the location 3F0H twice
write 87H to the location 3F0H twice
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address and value
pin is
Publication Release Date: January 1996
low active; if it issues IOW and the
W83877F
Revision A2