tza3015hw NXP Semiconductors, tza3015hw Datasheet - Page 18

• Manufacturer Part Number: tza3015hw
• Description: 30 Mbit/s To 3.2 Gbit/s A-rate 4-bit Fibre Optic Transceiver
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Receiver framing in other applications
In other applications frame headers may be used that are
shorter than 32 bits, e.g. 10 bits for Gigabit Ethernet. The
position of the frame header in the header register can be
chosen freely, but determines the boundary of the parallel
data on pins RXPD0(Q) to RXPD3(Q). After alignment, the
header bits that are programmed by bits H12 to H15 of
register HEADER1 (B2h), appear at the RXPD(Q) outputs.
A frame pulse appears at output RXFP(Q) at the same
time.
2003 Dec 16
handbook, halfpage
handbook, full pagewidth
ENBA
RXFP
30 Mbit/s to 3.2 Gbit/s A-rate
4-bit fibre optic transceiver
Fig.12 ENBA operating time with section
serial clock
terminating device.
serial data
RXPD0 to
RXPD3
RXPC
RXFP
ENBA
boundary detection enabled
Fig.11 Frame and byte detection in SDH/SONET application.
A1
MCE414
invalid data
18
Parity generation
Outputs RXPAR(Q) provide the even parity of the nibble
that is currently available on the parallel bus. With bit
RXPARINV of register RXMFOUTC0 (D4h), the parity can
be made odd. If no parity check is required, bit RXPAREN
of register RXMFOUTC0 (D4h) can be programmed to
disable this output, to reduce power dissipation.
handbook, halfpage
ENBA
RXFP
Fig.13 Alternate ENBA timing.
A1
boundary detection
A1
enabled
Preliminary specification
A2
TZA3015HW
A2, bits 0-3
valid
data
A2
MGU342
MCE415