tza3015hw NXP Semiconductors, tza3015hw Datasheet - Page 17

• Manufacturer Part Number: tza3015hw
• Description: 30 Mbit/s To 3.2 Gbit/s A-rate 4-bit Fibre Optic Transceiver
• Manufacturer: NXP Semiconductors

Philips Semiconductors
For this, it is necessary to program registers HEADERX3
to HEADERX0 (B4h to B7h). Programming a logic 1 into
the HEADERX register will turn the corresponding bit in the
HEADER register into a don’t care bit, in this way the
HEADER register is masked. An example of programming
the framing pattern is shown in Fig.10.
The default frame header pattern is F6F62828h,
corresponding to the middle section of the standard
SDH/SONET frame header (the last two A1 bytes plus the
first two A2 bytes).
If signal ENBA is LOW, no active alignment takes place.
However, if the framing pattern happens to occur in the
formatted data, a frame pulse will continue to be output on
pins RXFP(Q).
Receiver framing in SDH/SONET applications
Figure 11 shows a typical SDH/SONET re-frame
sequence involving byte alignment. Frame and byte
2003 Dec 16
handbook, full pagewidth
30 Mbit/s to 3.2 Gbit/s A-rate
4-bit fibre optic transceiver
Fig.10 Example of programming the frame pattern (the symbol ‘X’ represents a don’t care).
HEADERX3
HEADER3
received
data
bit 31
X
0
1
0
0
0
MSB HEADER
0
0
0
1
0
1
0
0
0
X
1
1
1
0
1
1
0
1
data stream
17
boundary detection is enabled on the rising edge of ENBA
and remains enabled while ENBA is HIGH. Boundaries are
recognized on receipt of the second A2 byte and RXFP
goes HIGH for one RXPC clock cycle.
The four most significant bits of the first A2 byte in the
frame header are the first bits that appear on the outgoing
data bus (RXPD0 to RXPD3) with the correct alignment.
When interfacing with a section terminating device, ENBA
must remain HIGH for a full frame after the initial frame
pulse. This is to allow the section terminating device to
verify internally that frame and byte alignment are correct
(see Fig.12). Byte boundary detection is disabled on the
first RXFP pulse after ENBA has gone LOW.
Figure 13 shows frame and byte boundary detection
activated on the rising edge of ENBA and deactivated by
the first RXFP pulse after ENBA has gone LOW.
0
0
0
1
0
1
LSB HEADER
1
0
1
0
0
0
0
0
0
0
0
0
X
1
1
bit 0
MGU548
0
1
X
HEADER0
HEADERX0
Preliminary specification
TZA3015HW