hyb18t512160af-5 Infineon Technologies Corporation, hyb18t512160af-5 Datasheet - Page 22

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hyb18t512160af-5

Manufacturer Part Number
hyb18t512160af-5
Description
512-mbit Ddr2 Sdram
Manufacturer
Infineon Technologies Corporation
Datasheet
Figure 3
Note:
1. UDQS/UDQS is data strobe for DQ[15:8],
2. LDM is the data mask signal for DQ[7:0], UDM is the
Data Sheet
LDQS/LDQS is data strobe for DQ[7:0]
data mask signal for DQ[15:8]
Pin Configuration for ×16 components, P-TFBGA-84 (top view)
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.#
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22
3.
V
They are isolated on the device from
and
DDL
HYB18T512[40/80/16]0AF–[3/3S/3.7/5]
V
and
SSQ
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.
Pin Configuration and Block Diagrams
V
DDSL
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are power and ground for the DLL.
512-Mbit DDR2 SDRAM
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09112003-SDM9-IQ3P
Rev. 1.3, 2005-01
V
DD
,
V
DDQ
,
V
SS

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