hyb18t512160bf-5 Infineon Technologies Corporation, hyb18t512160bf-5 Datasheet - Page 27

• Manufacturer Part Number: hyb18t512160bf-5
• Description: 240-pin Unbuffered Ddr2 Sdram Modules
• Manufacturer: Infineon Technologies Corporation

Table 17
Parameter
Device Supply Voltage
Output Supply Voltage
Input Reference Voltage
SPD Supply Voltage
DC Input Logic High
DC Input Logic Low
In / Output Leakage Current
1) Under all conditions,
2) Peak to peak AC noise on
3) Input voltage for any connector pin under test of 0 V ≤
3.3
3.3.1
Table 18
Speed Grade
IFX Sort Name
CAS-RCD-RP latencies
Parameter
Clock Frequency
Row Active Time
Row Cycle Time
RAS-CAS-Delay
Row Precharge Time
1) Timings are guaranteed with CK/CK differential Slew Rate of 2.0 V/ns. For DQS signals timings are guaranteed with a
2) The CK/CK input reference level (for timing reference to CK/CK) is the point at which CK and CK cross. The DQS / DQS,
3) Inputs are not recognized as valid until
4) The output timing reference voltage level is
5)
Data Sheet
differential Slew Rate of 2.0 V/ns in differential strobe mode and a Slew Rate of 1 V/ns in single ended mode. Timings are
further guaranteed for normal OCD drive strength (EMRS(1) A1 = 0) only.
RDQS / RDQS, input reference level is the crosspoint when in differential strobe mode
recognized as low.
t
equal to 9 x
RAS.MAX
is calculated from the maximum amount of time a DDR2 device can operate without a refresh command which is
Supply Voltage Levels and DC Operating Conditions
AC Characteristics
Speed Grade Definitions
Speed Grade Definition Speed Bins DDR2-800
t
REFI
.
@ CL = 6
@ CL = 3
@ CL = 4
@ CL = 5
V
DDQ
must be less than or equal to
V
REF
Symbol
V
V
V
V
V
V
I
may not exceed ± 2%
L
DD
DDQ
REF
DDSPD
IH(DC)
IL (DC
Symbol
t
t
t
t
t
t
t
t
CK
CK
CK
CK
RAS
RC
RCD
RP
)
V
REF
V
stabilizes. During the period before
TT
Values
Min.
1.7
1.7
0.49 ×
1.7
V
– 0.30
– 5
.
REF
+ 0.125
DDR2–800E
–2.5
6–6–6
Min.
3.75
3.75
3
2.5
45
60
15
15
V
V
V
REF (DC)
IN
DDQ
V
27
DD
≤
V
DDQ
.
V
HYS[64/72]T[16/32/64]0xxHU-[2.5/.../5]-A
Nom.
1.8
1.8
0.5 ×
—
—
—
—
REF
+ 0.3 V; all other pins at 0 V. Current is per pin
is also expected to track noise in
V
Unbuffered DDR2 SDRAM Modules
DDQ
Max.
8
8
8
8
70000
—
—
—
V
REF
Max.
1.9
1.9
0.51 ×
3.6
V
V
5
DDQ
REF
stabilizes, CKE = 0.2 x
– 0.125
+ 0.3
V
Electrical Characteristics
DDQ
Unit
t
—
ns
ns
ns
ns
ns
ns
ns
ns
CK
02182004-DHQB-4RRW
Unit
V
V
V
V
V
V
µA
Rev. 1.3, 2005-09
V
DDQ
Note
1)2)3)4)
1)2)3)4)
1)2)3)4)
1)2)3)4)
1)2)3)4)5)
1)2)3)4)
1)2)3)4)
1)2)3)4)
.
V
DDQ
Notes
1)
2)
3)
is