m24c32-wmn3p STMicroelectronics, m24c32-wmn3p Datasheet
m24c32-wmn3p
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m24c32-wmn3p Summary of contents
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... M24128-BW M24128 M24128-BR M24C64-W M24C64 M24C64-R M24C64-F M24C32-W M24C32 M24C32-R M24C32-F October 2006 Table 1 for root Supply voltage 2.5 to 5.5V 1.8 to 5.5V 2.5 to 5.5V 1.8 to 5.5V 1.7 to 5.5V 2.5 to 5.5V 1.8 to 5.5V 1.7 to 5.5V Rev 9 M24128 M24C64 M24C32 PDIP8 (BN) SO8 (MN) 150 mil width TSSOP8 (DW) 169 mil width UFDFPN8 (MB) 2x3mm² (MLP) www.st.com 1/34 1 ...
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... Minimizing system delays by polling on ACK . . . . . . . . . . . . . . . . . . . . . . 17 4.10 Read operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.11 Random Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.12 Current Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.13 Sequential Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.14 Acknowledge in Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5 Initial delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2/34 Serial Clock (SCL Serial Data (SDA Operating supply voltage Internal device reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 M24128, M24C64, M24C32 ...
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... M24128, M24C64, M24C32 7 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8 Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 9 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Contents 3/34 ...
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... Address least significant byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 6. Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 7. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Table 8. Operating conditions (M24128-BW, M24C64-W, M24C32- Table 9. Operating conditions (M24128-BR, M24C64-R, M24C32- Table 10. Operating conditions (M24C64-F, M24C32- Table 11. AC test measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Table 12. Input parameters Table 13. DC characteristics (V Table 14. DC characteristics (V Table 15. ...
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... M24128, M24C64, M24C32 List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 2. DIP, SO, TSSOP and UFDFPN connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 3. Device select code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 4. Maximum RP value versus bus parasitic capacitance (C) for an I2C bus . . . . . . . . . . . . . . 9 2 Figure bus protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 6. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 7. Write mode sequences with (data write inhibited Figure 8 ...
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... Summary description 1 Summary description The M24C32, M24C64 and M24128 devices are I programmable memories (EEPROM). They are organized as 4096 × 8 bits, 8192 × 8 bits and 16384 × 8 bits, respectively. In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. ECOPACK® packages are Lead-free and RoHS compliant. ECOPACK trademark. ...
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... M24128, M24C64, M24C32 Table 2. Signal names E0, E1, E2 SDA SCL Figure 2. DIP, SO, TSSOP and UFDFPN connections 1. See Package mechanical Chip Enable Serial Data Serial Clock Write Control Supply Voltage Ground M24128 M24C64 M24C32 SCL ...
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... When Write Control (WC) is driven High, Device Select and Address bytes are acknowledged, Data bytes are not acknowledged. 8/34 indicates how the value of the pull-up resistor can be calculated M24xxx M24xxx M24128, M24C64, M24C32 . (Figure 4 indicates how CC Figure 3. When not connected Ai12806 , and IL ...
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... M24128, M24C64, M24C32 2.3 Supply voltage (V 2.3.1 Operating supply voltage V Prior to selecting the memory and issuing instructions to it, a valid and stable V within the specified [V In order to secure a stable DC supply voltage recommended to decouple the V with a suitable capacitor (usually of the order of 10nF to 100nF) close to the V package pins ...
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... SDA SDA START Input Change Condition MSB MSB (1) Device Type Identifier b13 b12 b11 M24128, M24C64, M24C32 STOP Condition ACK ACK STOP Condition (2) Chip Enable Address b10 AI00792B ...
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... M24128, M24C64, M24C32 3 Memory organization The memory is organized as shown in Figure 6. Block diagram SCL SDA Figure 6. Control Logic I/O Shift Register Address Register and Counter Memory organization High Voltage Generator Data Register 1 Page X Decoder AI06899 11/34 ...
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... The device that controls the data transfer is known as the bus master, and the other as the slave device. A data transfer can only be initiated by the bus master, which will also provide the serial clock for synchronization. The M24C32, M24C64 and M24128 devices are always slaves in all communications. ...
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... M24128, M24C64, M24C32 4.5 Memory addressing To start communication between the bus master and the slave device, the bus master must initiate a Start condition. Following this, the bus master sends the Device Select Code, shown in Table 3 The Device Select Code consists of a 4-bit Device Type Identifier, and a 3-bit Chip Enable “ ...
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... BYTE WRITE WC PAGE WRITE WC (cont'd) PAGE WRITE (cont'd) 14/34 ACK ACK DEV SEL BYTE ADDR BYTE ADDR R/W ACK ACK DEV SEL BYTE ADDR BYTE ADDR R/W NO ACK NO ACK DATA IN N M24128, M24C64, M24C32 ACK NO ACK DATA IN ACK NO ACK DATA IN 1 DATA IN 2 AI01120C ...
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... This should be avoided, as data starts to become overwritten in an implementation dependent way. The bus master sends from bytes of data (for the M24C32 and M24C64 bytes of data (for the M24128), each of which is acknowledged by the device if Write Control (WC) is Low ...
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... BYTE WRITE WC PAGE WRITE WC (cont'd) PAGE WRITE (cont'd) 16/34 ACK ACK DEV SEL BYTE ADDR BYTE ADDR R/W ACK ACK DEV SEL BYTE ADDR BYTE ADDR R/W ACK ACK DATA IN N M24128, M24C64, M24C32 ACK ACK DATA IN ACK ACK DATA IN 1 DATA IN 2 AI01106C ...
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... M24128, M24C64, M24C32 Figure 9. Write cycle polling flowchart using ACK First byte of instruction with already decoded by the device 4.9 Minimizing system delays by polling on ACK During the internal Write cycle, the device disconnects itself from the bus, and writes a copy of the data from its internal latches to the memory cells. The maximum Write time (t ...
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... BYTE ADDR R/W ACK ACK DEV SEL DATA OUT 1 R/W ACK ACK DEV SEL * BYTE ADDR BYTE ADDR R/W ACK NO ACK DATA OUT N M24128, M24C64, M24C32 ACK ACK NO ACK DEV SEL * DATA OUT R/W ACK NO ACK DATA OUT N ACK ACK ACK DEV SEL * DATA OUT 1 R/W ...
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... M24128, M24C64, M24C32 4.10 Read operations Read operations are performed independently of the state of the Write Control (WC) signal. After the successful completion of a Read operation, the device’s internal address counter is incremented by one, to point to the next byte address. 4.11 Random Address Read A dummy Write is first performed to load the address into this address counter (as shown in Figure 10) but without sending a Stop condition ...
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... European directive on Restrictions on Hazardous Substances (RoHS) 2002/95/EU max must not be applied for more than 10s. LEAD 3. AEC-Q100-002 (compliant with JEDEC Std JESD22-A114A, C1=100pF, R1=1500 , R2=500 ) 20/34 Table 7 may cause permanent damage to Parameter (3) M24128, M24C64, M24C32 Min. Max. Unit –40 130 °C –65 150 °C (1) see note ° ...
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... Table 8. Operating conditions (M24128-BW, M24C64-W, M24C32-W) Symbol V Supply Voltage CC Ambient Operating Temperature (Device Grade Ambient Operating Temperature (Device Grade 3) Table 9. Operating conditions (M24128-BR, M24C64-R, M24C32-R) Symbol V Supply Voltage CC T Ambient Operating Temperature A Table 10. Operating conditions (M24C64-F, M24C32-F) Symbol V ...
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... Stand-by mode OUT SS 2.5V < (rise/fall time < 30ns) During t , 2.5V < 2.1mA 3mA M24128, M24C64, M24C32 Min. Max < 0.3V 50 200 CC > 0.7V 500 CC 200 Min. Table SDA in Hi-Z CC, < 5.5V, f =400kHz c < 5.5V CC ...
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... M24128, M24C64, M24C32 Table 14. DC characteristics (V Symbol Input Leakage Current I LI (SCL, SDA, E2, E1, E0) I Output Leakage Current LO I Supply Current (Read Supply Current (Write) CC0 I Stand-by Supply Current CC1 Input Low Voltage (SDA SCL, WC) Input High Voltage (SDA, ...
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... Test Condition Parameter (in addition to those in Table device in Stand-by mode OUT SS V =1.7V (rise/fall time < 30ns) During t , 1.7V < 1.7V < 0.7 mA M24128, M24C64, M24C32 (1) Min. 10 SDA in Hi-Z CC, = 400kHz c < 2. < 2.5V CC –0. Max. ...
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... M24128, M24C64, M24C32 Table 17. AC characteristics (V Symbol Alt SCL t t CHCL HIGH t t CLCH LOW ( DL1DL2 DXCX SU:DAT t t CLDX HD:DAT t t CLQX DH ( CLQV AA ( CHDX SU:STA t t DLCL HD:STA t t CHDH SU:STO t t DHDL ...
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... SCL tDLCL SDA In tCHDX START Condition SCL SDA In tCHDH STOP Condition SCL tCLQV SDA Out 26/34 tCLCH tCLDX tDXCX SDA Change SDA Input tW Write Cycle tCLQX Data Valid M24128, M24C64, M24C32 tCHDH tDHDL STOP START Condition Condition tCHDX START Condition AI00795C ...
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... M24128, M24C64, M24C32 8 Package mechanical Figure 13. PDIP8 – 8 pin Plastic DIP, 0.25mm lead frame, package outline 1. Drawing is not to scale. Table 19. PDIP8 – 8 pin Plastic DIP, 0.25mm lead frame, package mechanical data Symbol ...
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... Typ Min Max 1.75 0.10 0.25 1.25 0.28 0.48 0.17 0.23 0.10 4.90 4.80 5.00 6.00 5.80 6.20 3.90 3.80 4.00 1.27 – – 0.25 0.50 0° 8° 0.40 1.27 1.04 M24128, M24C64, M24C32 h x 45˚ c 0.25 mm GAUGE PLANE SO-A inches Typ Min 0.004 0.049 0.011 0.007 0.193 0.189 0.236 0.228 0.154 0.150 0.050 – 0.010 0° 0.016 0.041 Max 0.069 0.010 0.019 ...
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... M24128, M24C64, M24C32 Figure 15. TSSOP8 – 8 lead Thin Shrink Small Outline, package outline Drawing is not to scale. Table 21. TSSOP8 – 8 lead Thin Shrink Small Outline, package mechanical data Symbol millimeters Typ ...
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... A1 millimeters Typ Min Max 0.55 0.50 0.60 0.02 0.00 0.05 0.25 0.20 0.30 2.00 1.90 2.10 1.60 1.50 1.70 0.08 3.00 2.90 3.10 0.20 0.10 0.30 0.50 – – 0.45 0.40 0.50 0.15 0.30 M24128, M24C64, M24C32 UFDFPN-01 inches Typ Min Max 0.022 0.020 0.024 0.001 0.000 0.002 0.010 0.008 0.012 0.079 0.075 0.083 0.063 0.059 0.067 0.003 0.118 0.114 0.122 0.008 0.004 0.012 0.020 – ...
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... P = F6DP26% Chartered 1. Device grade 5 is available only with the operating voltage option F. 2. The UFDFPN8 package is available in M24C32-x devices only not available in M24C64-x devices strongly recommends the use of the Automotive Grade devices for use in an automotive environment. The High Reliability Certified Flow (HRCF) is described in the quality note QNEE9801. Please ask your nearest ST sales office for a copy ...
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... Product List summary table added. Device Grade 3 added. 4.5-5.5V range is Not for New Design. Some minor wording changes. AEC-Q100- 5.0 002 compliance. t (max) changed pins of the device. Z WCL 6.0 UFDFPN8 package added. Small text changes. M24128, M24C64, M24C32 Changes for E2-E0 and LI (min) improved to -0.45V. IL (min) and V (min) improved ...
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... Document revision history (continued) Date Revision 29-Jun-2006 03-Jul-2006 17-Oct-2006 Document converted to new ST template. M24C32 and M24C64 products (4.5 to 5.5V supply voltage) removed. M24C64 and M24C32 products (1.7 to 5.5V supply voltage) added. Section 2.1: Chip Enable (E0, E1, E2) (WC) modified, Section 2.3: Supply voltage (VCC) Power On Reset: VCC Lock-Out Write Protect T added, ...
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... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 34/34 Please Read Carefully: © 2006 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com M24128, M24C64, M24C32 ...