M24C32-WBN6P STMicroelectronics, M24C32-WBN6P Datasheet
M24C32-WBN6P
Specifications of M24C32-WBN6P
M24C32-WBN6P
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M24C32-WBN6P Summary of contents
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... Random and Sequential Read modes ■ Write protect of the whole memory array ■ Single supply voltage: – M24C32-W: 2 5.5 V – M24C32-R: 1 5.5 V – M24C32-xF: 1 5.5 V ■ Enhanced ESD/Latch-Up protection ■ More than 1 million Write cycles ■ More than 40-year data retention ■ ...
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... Write operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.7 Byte Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.8 Page Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.9 Write Identification Page (M24C32-D only 4.10 Lock Identification Page (M24C32-D only 4.11 ECC (Error Correction Code) and Write cycling . . . . . . . . . . . . . . . . . . . . 18 4.12 Minimizing system delays by polling on ACK . . . . . . . . . . . . . . . . . . . . . . 19 4.13 Read operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.14 Random Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4 ...
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... M24C32-DF, M24C32-W, M24C32-R, M24C32-F 4.16 Sequential Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.17 Read Identification Page (M24C32- 4.18 Read the lock status (M24C32- 4.19 Acknowledge in Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5 Initial delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 9 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 ...
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... Table 20. TSSOP8 – 8 lead thin shrink small outline, package mechanical data Table 21. UFDFPN8 (MLP8) 8-lead ultra thin fine pitch dual flat package no lead mm, data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Table 22. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Table 23. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 4/42 M24C32-DF, M24C32-W, M24C32-R, M24C32-F Doc ID 4578 Rev 18 ...
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... M24C32-DF, M24C32-W, M24C32-R, M24C32-F List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 2. 8-pin package connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 3. Device select code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2 Figure Fast mode (f C capacitance (C bus 2 Figure Fast mode Plus (f parasitic capacitance (C 2 Figure bus protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 7. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 8. Write mode sequences with (data write inhibited Figure 9 ...
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... The Start condition is followed by a Device Select code and Read/Write bit (RW) (as described in Inside this Device Select code, the 4-bit device type identifier code is (1010) for the M24C32 and (1011) for the M24C32-D. When writing data to the memory, the device inserts an acknowledge bit during the 9 time, following the bus master’ ...
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... M24C32-DF, M24C32-W, M24C32-R, M24C32-F Table 1. Signal names Signal name E0, E1, E2 SDA SCL Figure 2. 8-pin package connections 1. See Package mechanical data Function Chip Enable Serial Data Serial Clock Write Control Supply voltage Ground section for package dimensions, and how to identify pin-1. Doc ID 4578 Rev 18 ...
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... Control (WC) is driven high. When unconnected, the signal is internally read as V Write operations are allowed. When Write Control (WC) is driven high, device select and Address bytes are acknowledged, Data bytes are not acknowledged. 8/42 M24C32-DF, M24C32-W, M24C32-R, M24C32-F indicates how the value of the pull-up resistor can be calculated M24xxx ...
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... M24C32-DF, M24C32-W, M24C32-R, M24C32-F 2.5 V ground the reference for the V SS 2.6 Supply voltage (V 2.6.1 Operating supply voltage V Prior to selecting the memory and issuing instructions to it, a valid and stable V within the specified [V Table 9). In order to secure a stable DC supply voltage recommended to decouple the ...
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... Figure Fast mode Plus (f parasitic capacitance (C 100 Bus line capacitor (pF) 10/42 M24C32-DF, M24C32-W, M24C32-R, M24C32-F = 400 kHz): maximum bus When time constant must be below the 400 ns time constant line represented on the left 100 1000 Bus line capacitor (pF MHz): maximum R ...
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... M24C32-DF, M24C32-W, M24C32-R, M24C32-F 2 Figure bus protocol SCL SDA SCL SDA Start Condition SCL SDA Table 2. Address most significant byte b15 b14 Table 3. Address least significant byte b7 b6 SDA SDA Start Input Change Condition MSB MSB b13 b12 b11 Doc ID 4578 Rev 18 ...
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... Memory organization 3 Memory organization The memory is organized as shown in Figure 7. Block diagram SCL SDA 12/42 M24C32-DF, M24C32-W, M24C32-R, M24C32-F Figure 7. Control Logic I/O Shift Register Address Register and Counter Doc ID 4578 Rev 18 High Voltage Generator Data Register 1 Page X Decoder AI06899 ...
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... M24C32-DF, M24C32-W, M24C32-R, M24C32-F 4 Device operation The device supports the I data on to the bus is defined transmitter, and any device that reads the data receiver. The device that controls the data transfer is known as the bus master, and the other as the slave device. A data transfer can only be initiated by the bus master, which will also provide the serial clock for synchronization ...
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... E1, E0). The 4-bit device type identifier 1010b addresses the memory array (M24C32 and M24C32-D), and the 4-bit device type identifier 1011b addresses the Identification page (M24C32-D only). A device select code handling a value other than 1010b or 1011b is not acknowledged by the device. ...
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... M24C32-DF, M24C32-W, M24C32-R, M24C32-F Figure 8. Write mode sequences with (data write inhibited) WC Byte Write WC Page Write WC (cont'd) Page Write (cont'd) ACK ACK Dev select Byte address Byte address R/W ACK ACK Dev select Byte address Byte address R/W NO ACK NO ACK Data in N ...
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... NoAck. After each byte is transferred, the internal byte address counter (inside the page) is incremented. The transfer is terminated by the bus master generating a Stop condition. 16/42 M24C32-DF, M24C32-W, M24C32-R, M24C32-F , and the successful completion of a Write operation, W Figure 9 ...
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... Page Write (cont'd) 4.9 Write Identification Page (M24C32-D only) The Identification Page (32 bytes additional page which can be written and (later) permanently locked in Read-only mode. The Identification Page is written by issuing an Write Identification Page instruction. This instruction uses the same protocol and format as Page Write (into memory array), except for the following differences: ● ...
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... It is therefore recommended to write by word (4 bytes) at address 4*N (where integer) in order to benefit from the larger amount of Write cycles. The M24C32 devices are qualified as 1 million (1,000,000) Write cycles, using a cycling routine that writes to the device by multiples of 4-byte words. 18/42 ...
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... M24C32-DF, M24C32-W, M24C32-R, M24C32-F Figure 10. Write cycle polling flowchart using ACK First byte of instruction with already decoded by the device 4.12 Minimizing system delays by polling on ACK During the internal Write cycle, the device disconnects itself from the bus, and writes a copy of the data from its internal latches to the memory cells. The maximum Write time (t ...
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... Read Sequential Current Read Sequential Random Read 1. The seven most significant bits of the device select code of a Random Read (in the 1 be identical. 20/42 M24C32-DF, M24C32-W, M24C32-R, M24C32-F ACK NO ACK Dev select Data out R/W ACK ACK Dev select * Byte address Byte address ...
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... Read Identification Page (M24C32-D) The Identification Page (32 bytes additional page which can be written and (later) permanently locked in Read-only mode. The Identification Page can be read by issuing an Read Identification Page instruction. This instruction uses the same protocol and format as the Random Address Read (from memory array) with device type identifier defined as 1011b ...
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... Device operation 4.18 Read the lock status (M24C32-D) The locked/unlocked status of the Identification page can be checked by issuing a specific truncated command [Identification Page Write instruction + one data byte]: this data byte will be acknowledged if the Identification page is unlocked, while it will not be acknowledged if the Identification page is locked. ...
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... M24C32-DF, M24C32-W, M24C32-R, M24C32-F 5 Initial delivery state The device is delivered with all bits in the memory array set to 1 (each byte contains FFh). 6 Maximum rating Stressing the device outside the ratings listed in the device. These are stress ratings only, and operation of the device at these, or any other conditions outside those indicated in the Operating sections of this specification, is not implied ...
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... Table 10. AC test measurement conditions Symbol C Load capacitance bus SCL input rise/fall time, SDA input fall time Input levels Input and output timing reference levels 24/42 M24C32-DF, M24C32-W, M24C32-R, M24C32-F Parameter Parameter Parameter Parameter Doc ID 4578 Rev 18 Min. Max. Unit 2.5 5 ...
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... M24C32-DF, M24C32-W, M24C32-R, M24C32-F Figure 12. AC test measurement I/O waveform Input Levels 0.8V CC 0.2V CC Table 11. Input parameters Symbol C Input capacitance (SDA Input capacitance (other pins) IN Input impedance ( (E2, E1, E0, WC) Input impedance ( (E2, E1, E0, WC) 1. Characterized value, not tested in production. 2. E2,E1,E0: Input impedance when the memory is selected (after a Start condition). ...
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... Characterized value, not tested in production. 3. The device is not selected after power-up, after a Read instruction (after the Stop condition), or after the completion of the internal write cycle t 4. The new M24C32-W devices (identified by the process letter K) offer I 26/42 M24C32-DF, M24C32-W, M24C32-R, M24C32-F Test conditions (see ...
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... M24C32-DF, M24C32-W, M24C32-R, M24C32-F Table 13. DC characteristics (M24xxx-W - device grade 3) Symbol Parameter Input leakage current I (SCL, SDA, E0, E1, LI E2) Output leakage I LO current I Supply current (Read Supply current (Write) During t CC0 Standby supply I CC1 current Input low voltage V IL (SCL, SDA, WC) ...
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... Table 12 2. Only for devices operating Characterized value, not tested in production. 4. The device is not selected after power-up, after a Read instruction (after the Stop condition), or after the completion of the internal write cycle t 28/42 M24C32-DF, M24C32-W, M24C32-R, M24C32-F (1) Test conditions to those in Table 8 Table ...
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... M24C32-DF, M24C32-W, M24C32-R, M24C32-F Table 15. DC characteristics (M24xxx-F) Symbol Parameter Input leakage current I LI (E1, E2, SCL, SDA) I Output leakage current LO I Supply current (Read Supply current (Write) CC0 I Standby supply current CC1 Input low voltage V IL (SCL, SDA, WC) Input high voltage ...
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... I²C specification that the input signal rise and fall times be more than 20 ns and less than 300 ns when f < 400 kHz The new M24C32 device (identified by the process letter K) offers t (min), while the current device offers t safe margin compared to the avoid spurious Start and Stop conditions, a minimum delay is placed between SCL=1 and the falling or rising edge of SDA ...
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... NS 1. Only M24C32 and M24C32-D devices identified by the process letter K are qualified at 1 MHz. 2. Test conditions (in addition to those in 3. There is no min. or max. values for the input signal rise and fall times however recommended by the I²C specification that the input signal rise and fall times be more than 20 ns and less than 300 ns when f < ...
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... DC and AC parameters Figure 13. AC waveforms 32/42 M24C32-DF, M24C32-W, M24C32-R, M24C32-F Doc ID 4578 Rev 18 ...
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... M24C32-DF, M24C32-W, M24C32-R, M24C32-F 8 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ® ECOPACK trademark. Figure 14. PDIP8 – 8 pin plastic DIP, 0.25 mm lead frame, package outline 1 ...
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... SO8 narrow – 8 lead plastic small outline, 150 mils body width, package mechanical data Symbol ccc Values in inches are converted from mm and rounded to 4 decimal digits. 34/42 M24C32-DF, M24C32-W, M24C32-R, M24C32-F A ccc millimeters Typ Min Max 1.75 0.10 0.25 1.25 0.28 ...
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... M24C32-DF, M24C32-W, M24C32-R, M24C32-F Figure 16. TSSOP8 – 8 lead thin shrink small outline, package outline Drawing is not to scale. Table 20. TSSOP8 – 8 lead thin shrink small outline, package mechanical data Symbol α 1. Values in inches are converted from mm and rounded to 4 decimal digits millimeters Typ ...
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... (2) ddd 1. Values in inches are converted from mm and rounded to 4 decimal digits. 2. Applied for exposed die paddle and terminals. Exclude embedding part of exposed die paddle from measuring. 36/42 M24C32-DF, M24C32-W, M24C32-R, M24C32-F millimeters Typ Min Max 0.550 0.450 0.600 0.020 0 0.050 0.250 ...
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... M24C32-DF, M24C32-W, M24C32-R, M24C32-F 9 Part numbering Table 22. Ordering information scheme Example: Device type 2 M24 = I C serial access EEPROM Device function C32– Kbit (4096 x 8) Device family Blank: Without Identification page D: With additional Identification page Operating voltage Package ...
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... M24C32-DF, M24C32-W, M24C32-R, M24C32-F TSSOP8 package in place of TSSOP14 ( OrderingInfo, 2.3 PackageMechData). 2.4 TSSOP8 package data corrected References to Temperature Range 3 removed from Ordering Information 2.5 Voltage range -S added, and range -R removed from text and tables throughout ...
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... Document converted to new ST template. M24C32 and M24C64 products (4.5 to 5.5V supply voltage) removed. M24C64 and M24C32 products (1.7 to 5.5V supply voltage) added. Section 2.3: Chip Enable (E0, E1, E2) (WC) modified, Section 2.6: Supply voltage (VCC) Power On Reset: VCC Lock-Out Write Protect ...
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... Section 4.11: ECC (Error Correction Code) and Write cycling updated. I added to Table 6: Absolute maximum OL Table 24: Available M24C32 products (package, voltage range, 15 temperature grade) and Table 25: Available M24C32 products (package, voltage range, temperature grade) I2C modes supported specified in 16 Note removed from Table 15: DC characteristics changes ...
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... Table 6: Absolute maximum ratings – AC/DC tables 12, 16 with values specific to the device identified with process letter K Deleted: – Table 2: Device select code – Table 23: Available M24C32 products (package, voltage range, temperature grade) Doc ID 4578 Rev 18 Revision history Changes updated. updated. and modified ...
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... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 42/42 M24C32-DF, M24C32-W, M24C32-R, M24C32-F Please Read Carefully: © 2011 STMicroelectronics - All rights reserved STMicroelectronics group of companies www ...