dm74ls47 Fairchild Semiconductor, dm74ls47 Datasheet - Page 3

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dm74ls47

Manufacturer Part Number
dm74ls47
Description
Bcd To 7-segment Decoder/driver With Open-collector Outputs
Manufacturer
Fairchild Semiconductor
Datasheet

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t
t
t
t
PLH
PHL
PLH
PHL
Switching Characteristics
Note 6: LT = HIGH, A0–A3 = LOW
at V
Functional Description
The ’LS47 decodes the input data in the pattern indicated in
the Truth Table and the segment identification illustration. If
the input data is decimal zero, a LOW signal applied to the
RBI blanks the display and causes a multidigit display. For
example, by grounding the RBI of the highest order decoder
and connecting its BI/RBO to RBI of the next lowest order
decoder, etc., leading zeros will be suppressed. Similarly, by
grounding RBI of the lowest order decoder and connecting
its BI/RBO to RBI of the next highest order decoder, etc.,
trailing zeros will be suppressed. Leading and trailing zeros
can be suppressed simultaneously by using external gates,
i.e.: by driving RBI of a intermediate decoder from an OR
gate whose inputs are BI/RBO of the next highest and lowest
order decoders. BI/RBO also serves as an unconditional
blanking input. The internal NAND gate that generates the
RBO signal has a resistive pull-up, as opposed to a totem
pole, and thus BI/RBO can be forced LOW by external
means, using wired-collector logic. A LOW signal thus ap-
plied to BI/RBO turns off all segment outputs. This blanking
feature can be used to control display intensity by varying
the duty cycle of the blanking signal. A LOW signal applied to
LT turns on all segment outputs, provided that BI/RBO is not
forced LOW.
Symbol
CC
= +5.0V, T
Propagation Delay
An to a –g
Propagation Delay
RBI to a –g (Note 6)
A
= +25˚C
Parameter
Conditions
3
Min
C
R
L
L
= 15 pF
= 665
Max
100
100
100
100
www.fairchildsemi.com
Units
ns
ns

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