dm74ls112a Fairchild Semiconductor, dm74ls112a Datasheet - Page 2

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dm74ls112a

Manufacturer Part Number
dm74ls112a
Description
Dual Negative-edge-triggered Master-slave J-k Flip-flop With Preset, Clear, And Complementary Outputs
Manufacturer
Fairchild Semiconductor
Datasheet
www.fairchildsemi.com
V
V
V
I
I
f
f
t
t
t
t
t
t
T
OH
OL
CLK
CLK
W
W
SU
SU
H
H
Absolute Maximum Ratings
Recommended Operating Conditions
Note 3: C
Note 4: The symbol ( ) indicates the falling edge of the clock pulse is used for reference.
Note 5: C
A
CC
IH
IL
Supply Voltage
Input Voltage
Operating Free Air Temperature Range
Storage Temperature Range
Symbol
L
L
15 pF, R
50 pF, R
Supply Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Clock Frequency (Note 3)
Clock Frequency (Note 5)
Pulse Width
(Note 3)
Pulse Width
(Note 5)
Setup Time (Note 3)(Note 4)
Setup Time (Note 4)(Note 5)
Hold Time (Note 3)(Note 4)
Hold Time (Note 4)(Note 5)
Free Air Operating Temperature
L
L
2 k , T
2 k , T
A
A
25 C and V
25 C and V
Parameter
CC
CC
Clock HIGH
Preset LOW
Clear LOW
Clock HIGH
Preset LOW
Clear LOW
5V.
5V.
65 C to 150 C
0 C to 70 C
(Note 2)
7V
7V
2
Note 2: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
4.75
Min
20
25
20
25
25
25
30
30
0
5
2
0
0
0
Nom
5
5.25
Max
0.8
30
25
70
0.4
8
Units
MHz
MHz
mA
mA
ns
ns
ns
ns
ns
ns
V
V
V
C

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