dm74als5245 Fairchild Semiconductor, dm74als5245 Datasheet

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dm74als5245

Manufacturer Part Number
dm74als5245
Description
Octal 3-state Transceiver
Manufacturer
Fairchild Semiconductor
Datasheet
© 2000 Fairchild Semiconductor Corporation
DM74ALS5245WM
DM74ALS5245SJ
DM74ALS5245N
DM74ALS5245
Octal 3-STATE Transceiver
General Description
This octal bus transceiver is designed for asynchronous
two-way communication between data buses. The inputs
include hysteresis which provides improved noise rejec-
tion. Data is transmitted either from the A bus to the B bus
or from the B bus to the A bus depending on the logic level
of the direction control (DIR) input. The device can be dis-
abled via the enable input (G) which causes the outputs to
enter the high impedance mode so the buses are effec-
tively isolated.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Order Number
L
Package Number
LOW Logic Level
M20B
M20D
N20A
G
H
L
L
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Control Inputs
H
HIGH Logic Level
DS009175
DIR
H
X
L
Features
X
Input Hysteresis
Low output noise generation
High input noise immunity
Advanced oxide-isolated, ion implanted Schottky TTL
process
Switching specification guaranteed over the full temper-
ature and V
PNP inputs to reduce input loading
Don't Care (Either LOW or HIGH Logic Level)
High Impedance
B Data to A Bus
A Data to B Bus
Operation
Package Description
CC
range
October 1986
Revised February 2000
www.fairchildsemi.com

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dm74als5245 Summary of contents

Page 1

... Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide DM74ALS5245SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide DM74ALS5245N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. ...

Page 2

Absolute Maximum Ratings Supply Voltage Input Voltage Control Inputs I/O Ports Operating Free-Air Temperature Range Storage Temperature Range Typical JA N Package M Package Recommended Operating Conditions Symbol Parameter V Supply Voltage CC V HIGH Level Input Voltage IH V ...

Page 3

Switching Characteristics over recommended operating free air temperature range Symbol Parameter t Propagation Delay Time V PLH CC LOW-to-HIGH Level Output Propagation Delay Time C PHL L HIGH-to-LOW Level Output t Output Enable Time PZH to HIGH ...

Page 4

ALS Noise Characteristics The setup of a noise characteristics measurement is critical to the accuracy and repeatability of the tests. The following is a brief description of the setup used to measure the noise characteristics of ALS. Equipment: Word Generator ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M20D 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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