74abt374cscx-nl Fairchild Semiconductor, 74abt374cscx-nl Datasheet - Page 2

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74abt374cscx-nl

Manufacturer Part Number
74abt374cscx-nl
Description
Octal D-type Flip-flop With 3-state Outputs
Manufacturer
Fairchild Semiconductor
Datasheet
©1992 Fairchild Semiconductor Corporation
74ABT374 Rev. 1.4
Connection Diagram
Functional Description
The ABT374 consists of eight edge-triggered flip-flops
with individual D-type inputs and 3-STATE true outputs.
The buffered clock and buffered Output Enable are com-
mon to all flip-flops. The eight flip-flops will store the
state of their individual D inputs that meet the setup and
hold time requirements on the LOW-to-HIGH Clock (CP)
transition. With the Output Enable (OE) LOW, the con-
tents of the eight flip-flops are available at the outputs.
When OE is HIGH, the outputs are in a high impedance
state. Operation of the OE input does not affect the state
of the flip-flops.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to
estimate propagation delays.
2
Pin Descriptions
Function Table
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
NC = No Change
D
CP
OE
O
Pin Names
OE CP D
0
0
H
H
H
H
L
L
L
L
–D
–O
= LOW-to-HIGH Transition
Inputs
7
7
H
H
H
H
H
H
H
H
L
L
L
L
Data Inputs
Clock Pulse Input (Active Rising Edge)
3-STATE Output Enable Input
(Active LOW)
3-STATE Outputs
Internal Outputs
NC
NC
NC
NC
Q
H
H
L
L
Description
NC
NC
O
Z
Z
Z
Z
H
L
Hold
Hold
Load
Load
Data Available
Data Available
No Change in
Data
No Change in
Data
Function
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