mk50n512cmc100 Freescale Semiconductor, Inc, mk50n512cmc100 Datasheet - Page 32

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mk50n512cmc100

Manufacturer Part Number
mk50n512cmc100
Description
Arm Cortex-m4 Core With Dsp K50 Sub-family Data Sheet
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Peripheral operating requirements and behaviors
1. Typical data retention values are based on intrinsic capability of the technology measured at high temperature derated to
2. Data retention is based on T
3. Cycling endurance represents number of program/erase cycles at -40°C ≤ T
6.4.2 EzPort Switching Specifications
32
t
nvmretp100
n
Symbol
nvmcycp
25°C. For additional information on how Freescale defines typical data retention, please refer to Engineering Bulletin
EB618.
EP1a
Num
EP1
EP2
EP3
EP4
EP5
EP6
EP7
EP8
EP9
Data retention after up to 100 cycles
Cycling endurance
Description
Operating voltage
EZP_CK frequency of operation (all commands except
READ)
EZP_CK frequency of operation (READ command)
EZP_CS negation to next EZP_CS assertion
EZP_CS input valid to EZP_CK high (setup)
EZP_CK high to EZP_CS input invalid (hold)
EZP_D input valid to EZP_CK high (setup)
EZP_CK high to EZP_D input invalid (hold)
EZP_CK low to EZP_Q output valid (setup)
EZP_CK low to EZP_Q output invalid (hold)
EZP_CS negation to EZP_Q tri-state
Description
Table 21. NVM reliability specifications (continued)
K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
javg
Table 22. EzPort switching specifications
= 55°C (temperature profile over the lifetime of the application).
Preliminary
10 K
Min.
15
Typ.
j
TBD
TBD
≤ 125°C.
2 x t
1
Min.
2.7
EZP_CK
5
5
2
5
0
Max.
Freescale Semiconductor, Inc.
f
f
Max.
SYS
SYS
3.6
12
12
/2
/8
cycles
years
Unit
MHz
MHz
Unit
Notes
ns
ns
ns
ns
ns
ns
ns
ns
V
2
3

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