mk50n512cmc100 Freescale Semiconductor, Inc, mk50n512cmc100 Datasheet - Page 23

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mk50n512cmc100

Manufacturer Part Number
mk50n512cmc100
Description
Arm Cortex-m4 Core With Dsp K50 Sub-family Data Sheet
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Freescale Semiconductor, Inc.
Symbol
J10
J11
J12
J13
J14
J3
J4
J5
J6
J7
J8
J9
TCLK (input)
TCLK clock pulse width
TCLK rise and fall times
Boundary scan input data setup time to TCLK rise
Boundary scan input data hold time after TCLK rise
TCLK low to boundary scan output data valid
TCLK low to boundary scan output high-Z
TMS, TDI input data setup time to TCLK rise
TMS, TDI input data hold time after TCLK rise
TCLK low to TDO data valid
TCLK low to TDO high-Z
TRST assert time
TRST setup time (negation) to TCLK high
Description
• Boundary Scan
• JTAG and CJTAG
• Serial Wire Debug
Table 12. JTAG full voltage range electricals (continued)
K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
Figure 5. Test clock input timing
J4
Preliminary
J3
J2
J4
Peripheral operating requirements and behaviors
J3
12.5
Min.
100
1.4
50
25
20
0
8
8
Max.
22.1
22.1
25
25
3
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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