w83977tf Winbond Electronics Corp America, w83977tf Datasheet - Page 52

• Manufacturer Part Number: w83977tf
• Description: Winbond I/o
• Manufacturer: Winbond Electronics Corp America

Bit 4: When this bit is set to a logical 1, the UART enters diagnostic mode by an internal loopback, as
Bit 3: The UART interrupt output is enabled by setting this bit to a logic 1. In the diagnostic mode this bit
Bit 2: This bit is used only in the diagnostic mode. In the diagnostic mode this bit is internally connected
Bit 1: This bit controls the RTS output. The value of this bit is inverted and output to RTS .
Bit 0: This bit controls the DTR output. The value of this bit is inverted and output to DTR .
3.2.4 Handshake Status Register (HSR) (Read/Write)
This register reflects the current state of four input pins for handshake peripherals such as a modem
and records changes on these pins.
Bit 7: This bit is the opposite of the DCD input. This bit is equivalent to bit 3 of HCR in loopback mode.
Bit 6: This bit is the opposite of the RI input. This bit is equivalent to bit 2 of HCR in loopback mode.
Bit 5: This bit is the opposite of the DSR input. This bit is equivalent to bit 0 of HCR in loopback mode.
Bit 4: This bit is the opposite of the CTS input. This bit is equivalent to bit 1 of HCR in loopback mode.
Bit 3: TDCD. This bit indicates that the DCD pin has changed state after HSR was read by the CPU.
follows:
(1) SOUT is forced to logical 1, and SIN is isolated from the communication link instead of the
(2) Modem output pins are set to their inactive state.
(3) Modem input pins are isolated from the communication link and connect internally as DTR
is internally connected to the modem control input DCD .
to the modem control input RI .
TSR.
(bit 0 of HCR)
Aside from the above connections, the UART operates normally. This method allows the
CPU to test the UART in a convenient way.
RI and IRQ enable ( bit 3 of HCR)
7
DSR, RTS ( bit 1 of HCR)
6
5
4
3
2
DCD.
1
- 44 -
0
Clear to send (CTS)
Data set ready (DSR)
Ring indicator (RI)
Data carrier detect (DCD)
CTS toggling (TCTS)
RI falling edge (FERI)
DCD toggling (TDCD)
DSR toggling (TDSR)
CTS, Loopback RI input ( bit 2 of HCR)
Publication Release Date: March 1998
W83977TF
PRELIMINARY
Revision 0.62