w83977atg Winbond Electronics Corp America, w83977atg Datasheet - Page 128

• Manufacturer Part Number: w83977atg
• Description: W83877tf Plus Kbc, Gp I/o, Wake-up, Fir, Cir, Pb-free
• Manufacturer: Winbond Electronics Corp America

12.3.9 Power Management 1 Timer 1 (PM1TMR1)
Register Location:
Default Value:
Attribute:
Size:
12.3.10 Power Management 1 Timer 2 (PM1TMR2)
Register Location:
Default Value:
Attribute:
Size:
0-7
0-7
BIT
BIT
TMR_VAL
TMR_VAL
NAME
NAME
<CR60, 61> + 8H System I/O Space
00h
Read only
8 bits
This read-only field returns the running count of the power management timer. This is
a 24-bit counter that runs off of a 3.579545 MHZ clock, and counts in the working
state. The timer is reset and then continues counting until the CLKIN input to the chip
is stopped. If the clock is restarted without an MR reset, then the counter will resume
counting from where it stopped. The TMR_STS bit is set any time the last bit of the
timer (bit 23) goes from 0 to 1 or from 1 to 0. If the TMR_EN bit is set, the setting of
the TMR_STS bit will generate an
<CR60, 61> + 9H System I/O Space
00h
Read only
8 bits
This read-only field returns the running count of the power management timer. This is
a 24-bit counter that runs off of a 3.579545 MHZ clock, and counts in the working
state. The timer is reset and then continues counting until the CLKIN input to the chip
is stopped. If the clock is restarted without an MR reset, then the counter will resume
counting from where it stopped. The TMR_STS bit is set any time the last bit of the
timer (bit 23) goes from 0 to 1 or from 1 to 0. If the TMR_EN bit is set, the setting of
the TMR_STS bit will generate an
7
7
6
6
5
5
4
4
3
3
- 120 -
2
2
DESCRIPTION
DESCRIPTION
SCI
SCI
W83977ATF/W83977ATG
1
1
interrupt.
interrupt.
0
0
TMR_VAL8
TMR_VAL9
TMR_VAL10
TMR_VAL11
TMR_VAL12
TMR_VAL13
TMR_VAL14
TMR_VAL15
TMR_VAL0
TMR_VAL1
TMR_VAL2
TMR_VAL3
TMR_VAL4
TMR_VAL5
TMR_VAL6
TMR_VAL7