pdi1394p25 NXP Semiconductors, pdi1394p25 Datasheet - Page 40

• Manufacturer Part Number: pdi1394p25
• Description: 1-port 400 Mbps Physical Layer Interface
• Manufacturer: NXP Semiconductors

Philips Semiconductors
19.0 POWER-CLASS PROGRAMMING
The PC0–PC2 terminals are programmed to set the default value of the power-class indicated in the pwr field (bits 21–23) of the transmitted
self-ID packet. Descriptions of the various power-classes are given in Table 21. The default power-class value is loaded following a hardware
reset, but is overridden by any value subsequently loaded into the Pwr_Class field in register 4.
Table 21. Power Class Descriptions
2001 Sep 06
1-port 400 Mbps physical layer interface
PC0–PC2
000
001
010
100
101
011
110
111
Node does not need power and does not repeat power.
Node is self powered, and provides a minimum of 15 W to the bus.
Node is self powered, and provides a minimum of 30 W to the bus.
Node is self powered, and provides a minimum of 45 W to the bus.
Node may be powered from the bus and is using up to 3 W.
Node is powered from the bus and uses up to 3 W. No additional power is needed to enable the link.
Node is powered from the bus and uses up to 3 W. An additional 3 W is needed to enable the link.
Node is powered from the bus and uses up to 3 W. An additional 7 W is needed to enable the link.
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DESCRIPTION
PDI1394P25
Preliminary data