pdi1394p25 NXP Semiconductors, pdi1394p25 Datasheet - Page 14

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pdi1394p25

Manufacturer Part Number
pdi1394p25
Description
1-port 400 Mbps Physical Layer Interface
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
13.0 THERMAL CHARACTERISTICS
14.0 AC CHARACTERISTICS
15.0 TIMING WAVEFORMS
2001 Sep 06
SYMBOL
SYMBOL
SYMBOL
1-port 400 Mbps physical layer interface
Dn, CTLn, LREQ
R jA
t
C
SU
t
t
C
Figure 2. Dn, CTLn, LREQ input setup and hold times
t
t
H
D
r
f
L
i
SYSCLK
Junction-to-free-air thermal resistance
Transmit jitter
Transmit skew
TPA, TPB differential output voltage rise time
TPA, TPB differential output voltage fall time
Setup time, CTL0, CTL1, D0–D7, LREQ to SYSCLK
Hold time, CTL0, CTL1, D0–D7, LREQ after SYSCLK
Delay time SYSCLK to CTL0, CTL1, D0–D7
Capacitance load value CTL0, CTL1, D0–D7,
SYSCLK
Input capacitance CTL0, CTL1, D0–D7, LREQ
Figure 1. Test load diagram
TPAn+
TPBn+
TPAn–
TPBn–
PARAMETER
PARAMETER
t
SU
PARAMETER
t
H
SV01098
56
Board mounted, no air flow
SV01099
TEST CONDITION
TEST CONDITION
TPA, TPB
Between TPA and TPB
10% to 90%; At 1394 connector
90% to 10%; At 1394 connector
50% to 50%; See Figure 2
50% to 50%; See Figure 2
50% to 50%; See Figure 3
14
CONDITION
Figure 3. Dn, CTLn, output delay relative to SYSCLK
Dn, CTLn
SYSCLK
MIN
MIN
0.5
0.5
0.5
5
0
t
D
LIMITS
TYP
68
TYP
PDI1394P25
3.3
10
MAX
MAX
0.15
0.10
Preliminary data
1.2
1.2
11
SV01803
UNIT
UNIT
UNIT
C/W
pF
pF
ns
ns
ns
ns
ns
ns
ns

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