pxb4219 Infineon Technologies Corporation, pxb4219 Datasheet - Page 132
pxb4219
Manufacturer Part Number
pxb4219
Description
Iwe8 Interworking Element For 8 E1/t1 Lines
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PXB4219.pdf
(290 pages)
- Current page: 132 of 290
- Download datasheet (4Mb)
channel_
mode
ref_slot
1)
2)
Note: To allow IWE8 internal initialization, all channels must remain in inactive mode for
6.1.2.4
Read/write Address 00400
Reset value: Not applicable. RAM must be reset and initialized via SW.
Data Sheet
Not used
non-P format, cell may have only 46 user data octets in P format
Cb: Required bytes for the CAS sub-block in an ATM cell
31
23
15
7
at least 250 µ s after activation of the port (i.e. setting pcfN[p_rx_act] = 1). During
this time the device connected to the Framer Transmit Interface has to be in
normal operation.
RAM2: AAL Transmit Continuation Slot
Not used
X =
0 =
1 =
Channel mode
00 =
01 =
10 =
11 =
Reference slot indicator
1 =
next_slot_nr[4:0]
If pcfN[p_ces] = 1 or [aal0] = 1
Disabled
Enabled
Inactive mode
Active mode (normal mode)
Standby mode
Active mode (normal mode)
This slot is a reference slot
H
to 005FF
ref_slot_nr[4:0]
Not used
H
132
PXB4219 / PXB4220 / PXB4221
slot_index[4:0]
Not used
cont_slot
Memory Structure
= 1
2002-05-06
ref_slot
= 0
24
16
8
0
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