pxb4219 Infineon Technologies Corporation, pxb4219 Datasheet - Page 119
pxb4219
Manufacturer Part Number
pxb4219
Description
Iwe8 Interworking Element For 8 E1/t1 Lines
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PXB4219.pdf
(290 pages)
- Current page: 119 of 290
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5.8
The basic processing time of an octet in the IWE8 is 12 clock cycles. As the time needed
to process one octet for each of the 8 ports must be less than the time required to transfer
one octet over a framer interface, this leads to the condition:
with:
m = 12 master-clockcycles needed for one octet per port
o = 8 ports
f = Framer-clockcycles per bit
b = 8 bits per octet
Table 29
Mode
FAM, SYM8 and EC
GIM E1 and SYM2
GIM T1
Data Sheet
m o
T
Clock
×
× CLOCK f b
T
>
----- -
12
Master Clock
f
×
Master Clock Frequency Depending on Mode
T
FramerClk
<
×
×
T
< 1/12 x T
< 1/12 x T
< 1/3 x T
T FramerClk
CLOCK
FramerCLK
FramerCLK
FramerCLK
119
F
> 3 x F
> 12 x F
> 12 x F
CLOCK
PXB4219 / PXB4220 / PXB4221
FramerCLK
FramerCLK
FramerCLK
= 3 x 8.192 MHz
Interface Description
= 12 x 2.048 MHz
= 12 x 1.544 MHz
2002-05-06
[15]
[16]
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