pdiusbd12pwdh NXP Semiconductors, pdiusbd12pwdh Datasheet - Page 26

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pdiusbd12pwdh

Manufacturer Part Number
pdiusbd12pwdh
Description
Usb Interface Device With Parallel Bus
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
Table 17.
[1]
[2]
[3]
PDIUSBD12_9
Product data sheet
Symbol
t
Read timing
t
t
t
t
t
t
t
t
(WC
CLRL
RHCH
AVRL
RL
RLDD
RHDZ
RC
(WC
Can be negative.
For the DMA access only on the module 64
The t
WD)
RD)
WC
Parameter
write command to write data
CS_N (DMACK_N) LOW to RD_N LOW time
RD_N HIGH to CS_N (DMACK_N) HIGH time
A0 valid to RD_N LOW time
RD_N LOW pulse width
RD_N LOW to data driven time
RD_N HIGH to data Hi-Z time
read cycle time
write command to read data
Dynamic characteristics (parallel interface)
and t
RC
timing are valid for back-to-back data access only.
Fig 17. ALE timing
DATA[7:0]
ALE
th
byte and the second last (EOT
Rev. 09 — 11 May 2006
t
LH
t
AVLL
ADDRESS
…continued
Conditions
t
LLAX
USB peripheral controller with parallel bus
1) byte.
Min
600
0
130
5
0
20
-
-
500
600
[1]
[1]
[2]
[3]
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Typ
-
-
-
-
-
-
-
-
-
-
PDIUSBD12
DATA
Max
-
-
-
-
-
-
20
20
-
-
004aaa809
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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