pdiusbd12pwdh NXP Semiconductors, pdiusbd12pwdh Datasheet - Page 19

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pdiusbd12pwdh

Manufacturer Part Number
pdiusbd12pwdh
Description
Usb Interface Device With Parallel Bus
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
PDIUSBD12_9
Product data sheet
Table 9.
Table 10.
Bit
7
6
5
4 to 1
0
Error code
(binary)
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1101
1111
Fig 13. Read Last Transaction Status register: bit allocation
For bit allocation, see
Symbol
PREVIOUS STATUS NOT
READ
DATA0/1 PACKET
SETUP PACKET
ERROR CODE
DATA RECEIVE/TRANSMIT
SUCCESS
Read Last Transaction Status register: bit allocation
Error codes
Description
no error
PID encoding error; bits 7 to 4 are not the inversion of bits 3 to 0
PID unknown; encoding is valid, but PID does not exist
unexpected packet; packet is not of the type expected (= token, data or
acknowledge), or SETUP token to a non-control endpoint
token CRC error
data CRC error
time-out error
never happens
unexpected End-Of-Packet (EOP)
sent or received NAK
sent stall, a token was received, but the endpoint was stalled
overflow error, the received packet was longer than the available buffer space
bit stuff error
wrong DATA PID; the received DATA PID was not what was expected
7 6 5 4 3
0 0
Rev. 09 — 11 May 2006
0 0
Table
0
9.
2
0
1
0
Description
Logic 1 indicates a second event occurred before the
previous status was read.
Logic 1 indicates the last successful received or sent
packet had a DATA1 PID.
Logic 1 indicates the last successful received packet had a
SETUP token (this will always read 0 for IN buffers).
See
Logic 1 indicates that data has been successfully received
or transmitted.
0
0
Table 10
Power-on value
DATA RECEIVE/TRANSMIT SUCCESS
ERROR CODE (see table)
SETUP PACKET
DATA 0/1 PACKET
PREVIOUS STATUS NOT READ
USB peripheral controller with parallel bus
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
004aaa805
PDIUSBD12
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