aduc847bs8-3 Analog Devices, Inc., aduc847bs8-3 Datasheet - Page 17

• Manufacturer Part Number: aduc847bs8-3
• Description: Microconverter, 10-channel 24-bit Adc With Embedded 62kb Flash Mcu
• Manufacturer: Analog Devices, Inc.

MEMORY7 ORGANISATION
The ADuC847 contains 4 different memory blocks namely:
(1) Flash/EE Program Memory
The ADuC847 provides up to 62kBytes of Flash/EE program
memory to run user code.
When EA is pulled high externally during a power cycle or a
hardware reset the part defaults to code execution from its internal
62kBytes of Flash/EE program memory. The ADuC847 does not
support the rollover from internal code space to external code
space. No external code space is available on the ADuC847.
Permanently embedded firmware allows code to be serially
downloaded to the 62kBytes of internal code space via the UART
serial port while the device is in-circuit. No external hardware is
required.
56kBytes of the program memory can be reprogrammed during
runtime hence the code space can be upgraded in the field using a
user defined protocol or it can be used as a data memory. This will
be discussed in more detail in the Flash/EE Memory section of the
datasheet.
(2) Flash/EE Data Memory
4kBytes of Flash/EE Data Memory are available to the user and
can be accessed indirectly via a group of registers mapped into the
Special Function Register (SFR) area. Access to the Flash/EE Data
memory is discussed in detail later as part of the Flash/EE memory
section in this data sheet.
(3) General Purpose RAM
The general purpose RAM is divided into two separate memories,
namely the upper and the lower 128 bytes of RAM. The lower 128
bytes of RAM can be accessed through direct or indirect addressing
while the upper 128 bytes of RAM can only be accessed through
indirect addressing as it shares the same address space as the SFR
space which can only be accessed through direct addressing.
The lower 128 bytes of internal data memory are mapped as shown
in Figure 3. The lowest 32 bytes are grouped into four banks of
eight registers addressed as R0 through R7. The next 16 bytes (128
bits), locations 20Hex through 2FHex above the register banks,
form a block of directly addressable bit locations at bit addresses
00H through 7FH. The stack can be located anywhere in the
internal memory address space, and the stack depth can be
expanded up to 2048 bytes.
Reset initializes the stack pointer to location 07 hex. Any call or
push pre-increments the SP before loading the stack. Hence
loading the stack starts from locations 08 hex which is also the first
register (R0) of register bank 1. Thus, if one is going to use more
than one register bank, the stack pointer should be initialized to an
area of RAM not used for data storage.
REV. PrA 05/03
- 62k/30k/6k Bytes of On-Chip Flash/EE Program Memory
- 4kBytes of On-Chip Flash/EE Data Memory
- 256 Bytes of General Purpose RAM
- 2kBytes of Internal XRAM
-17-
(4) Internal XRAM
The ADuC847 contains 2kBytes of on-chip extended data memory.
This memory, although on-chip, is accessed via the MOVX
instruction. The 2kBytes of internal XRAM are mapped into the
bottom 2kBytes of the external address space if the CFG847.0 (see
Table III) bit is set, otherwise access to the external data memory
will occur just like a standard 8051.
Even with the CFG847.0 bit set access to the external XRAM will
occur once the 24 bit DPTR is greater than 0007FFH.
When accessing the internal XRAM, the P0, P2 port pins as well as
the RD and WR strobes will not be output as per a standard 8051
MOVX instruction. This allows the user to use these port pins as
standard I/O.
BITS IN PSW
SELECTED
BANKS
Figure 3. Lower 128 Bytes of Internal Data Memory
VIA
Figure 4: Internal and External XRAM
11
10
01
00
30H
20H
18H
10H
08H
00H
7FH
2FH
1FH
17H
0FH
07H
GENERAL-PURPOSE
AREA
BIT-ADDRESSABLE
(BIT ADDRESSES)
FOUR BANKS OF EIGHT
REGISTERS
R0 R7
RESET VALUE OF
STACK POINTER