sta015t-013tr STMicroelectronics, sta015t-013tr Datasheet - Page 51

no-image

sta015t-013tr

Manufacturer Part Number
sta015t-013tr
Description
Mpeg 2.5 Layer Iii Audio Decoder With Adpcm Capability
Manufacturer
STMicroelectronics
Datasheet
6.5 STA015 CONFIGURATION FILE FORMAT
The STA015 Configuration File is an ASCII format. An example of the file format is the following:
58 1
42 4
128 15
............
It is a sequence of rows and each one can be interpreted as an I
the I
ration file into the device, a sequence of write operation to STA015 I
The following program describes the I
STA015 Configuration Code (pseudo code)
download cfg - file
{
fopen (cfg_file);
fp:=1;
do {
while (!EDF)
}
Note: 1. STA015 is a device based on an integrated DSP core. Some of the I
I
I
I
I
I
fp++;
}
2
2
2
2
2
2
C address (register) and the second one is the I
2. Refer also to the application note AN1250
C_stop_cond;
C_start_cond;
C_write_dev_addr;
C_write_subaddress (fp); /* write subaddress
C_write_data (fp);
boot operation. The bootstrap time is 60 micro second. Only after this time lenght, the data in the register can be considered stable
.
42
/* write STA015 device address
/* write data
/* repeat until End of File
/* End routine
/* generate I
/* generate I
/*set file pointer to first row */
/* update pointer to new file row
2
C routine to be implemented for the configuration driver:
4
D98AU976
2
2
C start condition for STA015 device address */
C stop condition
2
C data (value). To download the STA015 configu-
I
I
2
2
C REGISTER VALUE
C SUB-ADDRESS
2
C registers default values are loaded after an internal DSP
2
C command. The first part of the row is
2
C interface must be performed.
STA015 STA015B STA015T
*/
*/
*/
*/
*/
*/
*/
51/55

Related parts for sta015t-013tr