sta015t-013tr STMicroelectronics, sta015t-013tr Datasheet - Page 10

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sta015t-013tr

Manufacturer Part Number
sta015t-013tr
Description
Mpeg 2.5 Layer Iii Audio Decoder With Adpcm Capability
Manufacturer
STMicroelectronics
Datasheet
STA015 STA015B STA015T
Init Mode
"PLAY" and "MUTE" changes are ignored in this mode. The internal state of the decoder will be updated
only when the decoder changes from the state "init" to the state "decode". The "init" phase ends when the
first decoded samples are at the output stage of the device.
Decode Mode
This mode is completely described by the following table:
Figure 7. MPEG Decoder Interface
Figure 8. Serial Input Interface Clocks
3.0 INTERFACE DESCRIPTION
3.1 Serial Input Interface
STA015 receives the input data (MSB first) through the Serial Input Interface (Fig.7). It is a serial commu-
nication interface connected to the SDI (Serial Data Input) and SCKR (Receiver Serial Clock).
The interface can be configured to receive data sampled on both rising and falling edge of the SCKR clock.
The BIT_EN pin, when set to low, forces the bitstream input interface to ignore the incoming data. For
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PLAY
0
0
1
1
BIT_EN
SCKR
SCKR
SDI
SOURCE
DATA
MUTE
D98AU912
0
1
0
1
DATA VALID
DATA_REQ
BIT_EN
SCKR
SDI
XTI
SERIAL AUDIO INTERFACE
XTO
D98AU968A
Not Running
Clock State
PLL
RX
DECODER
Running
Running
Running
FILT
MPEG
SCL
µP
IIC
IIC
TX
SDA
DATA IGNORED
DATA
Decoded Samples
PCM Output
SDO
SCKT
LRCKT
IGNORED
OCLK
0
0
0
DAC
SCLK_POL=0
SCLK_POL=4
Decoding
Yes
Yes
No
No

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