sta015t-013tr STMicroelectronics, sta015t-013tr Datasheet - Page 35

• Manufacturer Part Number: sta015t-013tr
• Description: Mpeg 2.5 Layer Iii Audio Decoder With Adpcm Capability
• Manufacturer: STMicroelectronics

Address: 0x67, 0x68, 0x69 (103 - 104 - 105)
Type: RO
Software Reset: 0x00
Hardware Reset: 0x00
The three registers are considered logically concatenated and compose the Global Frame Counter as de-
scribed in the table.
It is updated at every decoded MPEG Frame. The registers are reset on both hardware and software reset.
AVERAGE_BITRATE
Address: 0x6A (106)
Type: RO
Software Reset: 0x00
Hardware Reset: 0x00
AVERAGE_BITRATE is a read-only register and it contains the average bitrate of the incoming bitstream
divided by two.
The value is rounded with an accuracy of 1 Kbit/sec.
SOFTVERSION
Address: 0x71 (113)
Type: RO
After the STA015 boot, this register contains the version code of the embedded software.
RUN
Address: 0x72 (114)
Type: RW
Software Reset: 0x00
Hardware Reset: 0x00
Setting this register to 1, STA015 leaves the idle state, starting the decoding process.
The Microcontroller is allowed to set the RUN flag, once all the control registers have been initialized.
MSB
MSB
MSB
AB7
SV7
b7
b7
b7
X
AB6
SV6
b6
b6
b6
X
AB5
SV5
b5
b5
b5
X
AB4
SV4
b4
b4
b4
X
AB3
SV3
b3
b3
b3
X
AB2
SV2
b2
b2
b2
X
STA015 STA015B STA015T
AB1
SV1
b1
b1
b1
X
RUN
LSB
LSB
LSB
AB0
SV0
b0
b0
b0
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