mfrc52301hn1-trayb NXP Semiconductors, mfrc52301hn1-trayb Datasheet - Page 85
mfrc52301hn1-trayb
Manufacturer Part Number
mfrc52301hn1-trayb
Description
Contactless Reader Ic
Manufacturer
NXP Semiconductors
Datasheet
1.MFRC52301HN1-TRAYB.pdf
(98 pages)
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NXP Semiconductors
MFRC523_33
Product data sheet
PUBLIC
16.1.3.5 Example: Output test signal RX data stream
16.1.3.6 PRBS
Figure 32
register’s TestBusSel[4:0] bits are set to 07h to enable test bus signals on pins D1 to D6;
see
06h (pin D6 = s_data) and AnalogTestReg register is set to FFh (TstBusBit) which outputs
the received data stream on pins AUX1 and AUX2.
The pseudo-random binary sequences PRBS9 and PRBS15 are based on ITU-TO150
and are defined with the TestSel2Reg register. Transmission of either data stream is
started by the Transmit command. The preamble/sync byte/start bit/parity bit are
automatically generated depending on the mode selected.
Remark: All relevant registers for transmitting data must be configured in accordance with
ITU-TO150 before selecting PRBS transmission.
Fig 32. Received data stream on pins AUX1 and AUX2
Section 16.1.2 on page
(1) s_data (received data stream) (2 V/div).
(2) RF field.
shows the data stream that is currently being received. The TestSel2Reg
All information provided in this document is subject to legal disclaimers.
Rev. 3.3 — 5 March 2010
80. The TestSel1Reg register’s TstBusBitSel[2:0] bits are set
115233
(1)
(2)
Contactless reader IC
20 μs/div
MFRC523
001aak601
© NXP B.V. 2010. All rights reserved.
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