mfrc52301hn1-trayb NXP Semiconductors, mfrc52301hn1-trayb Datasheet - Page 49

• Manufacturer Part Number: mfrc52301hn1-trayb
• Description: Contactless Reader Ic
• Manufacturer: NXP Semiconductors

NXP Semiconductors
MFRC523_33
Product data sheet
PUBLIC
9.2.2.5 TxControlReg register
Table 60.
Controls the logical behavior of the antenna driver pins TX1 and TX2.
Table 61.
Table 62.
Bit
3
2
1 to 0
Bit
Symbol InvTx2RF
Access
Bit Symbol
7
6
5
4
3
2
1
0
InvTx2RFOn 1
InvTx1RFOn 1
InvTx2RFOff 1
InvTx1RFOff 1
Tx2CW
reserved
Tx2RFEn
Tx1RFEn
Symbol
RxNoErr
RxMultiple
RxFraming
RxModeReg register bit descriptions
TxControlReg register (address 14h); reset value: 80h bit allocation
TxControlReg register bit descriptions
R/W
On
7
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Value Description
1
0
-
1
1
InvTx1RF
R/W
On
Rev. 3.3 — 5 March 2010
Value
1
0
1
00
01
10
11
6
output signal on pin TX2 inverted when driver TX2 is enabled
output signal on pin TX1 inverted when driver TX1 is enabled
output signal on pin TX2 inverted when driver TX2 is disabled
output signal on pin TX1 inverted when driver TX1 is disabled
output signal on pin TX2 continuously delivers the unmodulated
13.56 MHz energy carrier
Tx2CW bit is enabled to modulate the 13.56 MHz energy carrier
reserved for future use
output signal on pin TX2 delivers the 13.56 MHz energy carrier
modulated by the transmission data
output signal on pin TX1 delivers the 13.56 MHz energy carrier
modulated by the transmission data
InvTx2RF
115233
Description
an invalid received data stream (less than 4 bits received) will
be ignored and the receiver remains active
receiver is deactivated after receiving a data frame
able to receive more than one data frame
only valid for data rates above 106 kBd in order to handle the
polling command
after setting this bit the Receive and Transceive commands will
not terminate automatically. Multiple reception can only be
deactivated by writing any command (except the Receive
command) to the CommandReg register, or by the host clearing
the bit
if set to logic 1, an error byte is added to the FIFO buffer at the
end of a received data stream which is a copy of the ErrorReg
register value
defines the expected framing for data reception
R/W
ISO/IEC 14443 A/MIFARE
reserved
reserved
ISO/IEC 14443 B
Off
5
InvTx1RF
R/W
Off
4
…continued
Tx2CW reserved Tx2RFEn Tx1RFEn
R/W
3
2
-
Contactless reader IC
MFRC523
© NXP B.V. 2010. All rights reserved.
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