mfrc52301hn1-trayb NXP Semiconductors, mfrc52301hn1-trayb Datasheet - Page 63

• Manufacturer Part Number: mfrc52301hn1-trayb
• Description: Contactless Reader Ic
• Manufacturer: NXP Semiconductors

NXP Semiconductors
MFRC523_33
Product data sheet
PUBLIC
9.2.4.4 TestPinEnReg register
9.2.4.5 TestPinValueReg register
Table 121. TestSel2Reg register (address 32h); reset value: 00h bit allocation
Table 122. TestSel2Reg register bit descriptions
Enables the test bus pin output driver.
Table 123. TestPinEnReg register (address 33h); reset value: 80h bit allocation
Table 124. TestPinEnReg register bit descriptions
Defines the HIGH and LOW values for the test port D1 to D7 when it is used as I/O.
Bit
Symbol
Access
Bit
7
6
5
4 to 0 TestBusSel
Bit
Symbol
Access
Bit
7
6 to 1 TestPinEn
0
Symbol
RS232LineEn 0
[5:0]
reserved
Symbol
TstBusFlip
PRBS9
PRBS15
[4:0]
RS232LineEn
TstBusFlip
R/W
R/W
7
7
All information provided in this document is subject to legal disclaimers.
Value Description
1
-
-
-
Value Description
-
-
PRBS9
Rev. 3.3 — 5 March 2010
R/W
test bus is mapped to the parallel port in the following order:
TstBusBit4,TstBusBit3, TstBusBit2, TstBusBit6, TstBusBit5, TstBusBit0;
see
starts and enables the PRBS9 sequence according to ITU-TO150
Remark: all relevant registers to transmit data must be configured
before entering PRBS9 mode
the data transmission of the defined sequence is started by the
Transmit command
starts and enables the PRBS15 sequence according to ITU-TO150
Remark: all relevant registers to transmit data must be configured
before entering PRBS15 mode
the data transmission of the defined sequence is started by the
Transmit command
selects the test bus; see
6
6
enables the output driver on one of the data pins D1 to D7 which
outputs a test signal
Example:
Remark: If the SPI is used, only pins D1 to D4 can be used. If the
serial UART interface is used and the RS232LineEn bit is set to
logic 1 only pins D1 to D4 can be used.
reserved for future use
serial UART lines MX and DTRQ are disabled
Section 16.1 on page 80
setting bit 1 to logic 1 enables pin D1 output
setting bit 5 to logic 1 enables pin D5 output
115233
PRBS15
R/W
5
5
TestPinEn[5:0]
4
4
Section 16.1 “Test signals”
R/W
3
3
TestBusSel[4:0]
R/W
2
2
Contactless reader IC
MFRC523
© NXP B.V. 2010. All rights reserved.
1
1
reserved
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0
0
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