mfrc531 NXP Semiconductors, mfrc531 Datasheet - Page 23

• Manufacturer Part Number: mfrc531
• Description: Iso/iec 14443 Reader Ic
• Manufacturer: NXP Semiconductors

NXP Semiconductors
MFRC531_34
Product data sheet
PUBLIC
9.5.1.1 Timer unit block diagram
9.5.1.2 Controlling the timer unit
9.5.1 Timer unit implementation
Figure 8
The timer unit is designed, so that events when combined with enabling flags start or stop
the counter. For example, setting bit TStartTxBegin = logic 1 enables control of received
data with the timer unit. In addition, the first received bit is indicated by the TxBegin event.
This combination starts the counter at the defined TReloadValue[7:0].
The timer stops automatically when the counter value is equal to zero or if a defined stop
event happens.
The main part of the timer unit is a down-counter. As long as the down-counter value is
not zero, it decrements its value with each timer clock cycle.
If the TAutoRestart flag is enabled, the timer does not decrement down to zero. On
reaching value 1, the timer reloads the next clock function with the TReloadValue[7:0].
Fig 8.
to parallel interface
shows the block diagram of the timer module.
Timer module block diagram
RxBegin Event
TxBegin Event
TStopRxBegin
TStartTxBegin
TAutoRestart
RxEnd Event
TxEnd Event
TStartTxEnd
TStopRxEnd
13.56 MHz
TRunning
Rev. 3.4 — 26 January 2010
056634
TPreScaler[4:0]
TimerValue[7:0]
TStartNow
TStopNow
Q
Q
S
R
DIVIDER
START COUNTER/
PARALLEL LOAD
STOP COUNTER
CLOCK
to interrupt logic: TimerIRq
COUNTER MODULE
TReloadValue[7:0]
ISO/IEC 14443 reader IC
PARALLEL OUT
PARALLEL IN
Counter = 0 ?
(x ≤ x − 1)
MFRC531
© NXP B.V. 2010. All rights reserved.
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