uja1079tw/5v0/wd NXP Semiconductors, uja1079tw/5v0/wd Datasheet - Page 5

• Manufacturer Part Number: uja1079tw/5v0/wd
• Description: Lin Core System Basis Chip
• Manufacturer: NXP Semiconductors

NXP Semiconductors
5. Pinning information
UJA1079_1
Product data sheet
5.1 Pinning
5.2 Pin description
Table 2.
Symbol
i.c.
i.c.
TXDL
V1
RXDL
RSTN
INTN
EN
SDI
SDO
SCK
SCSN
i.c.
i.c.
TEST1
WDOFF
LIMP
Fig 2.
Pin configuration
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
Rev. 01 — 1 December 2009
WDOFF
Description
internally connected; should be left floating
internally connected; should be left floating
LIN transmit data input
voltage regulator output for the microcontroller (5 V or 3.3 V depending on
SBC version)
LIN receive data output
reset input/output to and from the microcontroller
interrupt output to the microcontroller
enable output
SPI data input
SPI data output
SPI clock input
SPI chip select input
internally connected; should be left floating
internally connected; should be left floating
test pin; pin should be connected to ground
WDOFF pin for deactivating the watchdog
limp home output
TEST1
SCSN
RXDL
RSTN
TXDL
INTN
SDO
SCK
SDI
EN
i.c.
i.c.
i.c.
i.c.
V1
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
UJA1079
015aaa124
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
LIN core system basis chip
BAT
VEXCTRL
TEST2
VEXCC
WBIAS
i.c.
DLIN
LIN
i.c.
GND
i.c.
i.c.
i.c.
WAKE2
WAKE1
LIMP
UJA1079
© NXP B.V. 2009. All rights reserved.
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