peb20534 Infineon Technologies Corporation, peb20534 Datasheet - Page 356

• Manufacturer Part Number: peb20534
• Description: Dma Supported Serial Communication Controller With 4 Channels
• Manufacturer: Infineon Technologies Corporation

Data Sheet
SSCEN
SSCMS
SSCBSY
SSC Enable
This bit selects whether the SSC is in ’configuration mode’ or in normal
’operation mode’. The meaning of bits 14..0 depends on the setting of
this bit:
SSCEN=’0’
SSCEN=’1’
SSC Master Select
This bit selects whether the SSC is operating in master or in slave mode.
Bit ’SSCMS’ is valid in configuration and operation mode of register
SSCCON:
SSCMS=’0’
SSCMS=’1’
SSC Busy Status Flag
This bit indicates that a transfer is currently in process:
SSCBSY
=’0’
SSCBSY
=’1’
The SSC is in configuration mode. Bits 14..0 provide
control bits for SSC configuration.
The SSC is in normal operation mode. Bits 14..0 provide
status information bits.
The SSC is slave. Operation is performed by the shift
clock, supplied at pin MCLK (input).
The SSC is master. Operation is performed by the
internally generated shift clock which is monitored at pin
MCLK (output).
No transfer is in process.
A transfer is currently in process.
356
Detailed Register Description
(configuration/operation mode)
(operation mode)
PEB 20534
PEF 20534
2000-05-30
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