peb20534 Infineon Technologies Corporation, peb20534 Datasheet - Page 152
peb20534
Manufacturer Part Number
peb20534
Description
Dma Supported Serial Communication Controller With 4 Channels
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB20534.pdf
(439 pages)
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7.4.1.7
This clock mode is identical to clock mode 2a/2b except that the clock source of the BRG
is supplied at pin XTAL1.
The BRG is driven by the internal oscillator and delivers a reference clock for the DPLL
which is 16 times the resulting DPLL output frequency which in turn supplies the internal
receive clock. Depending on the programming of register CCR0 bit ’SSEL’, the transmit
clock will be either an external input clock signal provided at pin TxCLK in clock mode
6a or the clock delivered by the BRG divided by 16 in clock mode 6b. In the latter case,
the transmit clock can be driven out to pin TxCLK if enabled via bit ’TOE’ in register
CCR2.
Figure 50
Data Sheet
Clock Mode 6 (6a/6b)
clock mode 6a
clock mode 6b
Clock Mode 6a/6b Configuration
or
or
DPLL
Ctrl.
DPLL
OSC
BRG
OSC
BRG
Ctrl.
16:1
Ctrl.
Ctrl.
RxCLK
CTS, CxD, TCG
CD, FSC, RCG
TxCLK
RTS
RxD
TxD
RxCLK
CTS, CxD, TCG
CD, FSC, RCG
TxCLK
RTS
RxD
TxD
Serial Communication Controller (SCC) Cores
152
(tx clock monitor output)
V
V
SS
SS
clock supply
1
PEB 20534
PEF 20534
2000-05-30
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