peb20534 Infineon Technologies Corporation, peb20534 Datasheet - Page 117
peb20534
Manufacturer Part Number
peb20534
Description
Dma Supported Serial Communication Controller With 4 Channels
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB20534.pdf
(439 pages)
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Figure 34
The operating mode of the serial channel SSC is controlled by its bit-addressable control
register SSCCON. This register serves for two purposes:
• during programming (SSC disabled by SSCEN=’0’) it provides access to a set of
• during operation (SSC enabled by SSCEN=’1’) it provides access to a set of status
A detailed control register description for each of the two modes is provided in
Registers Description” on Page
The shift register of the SSC is connected to both the transmit pin and the receive pin via
the pin control logic (see block diagram). Transmission and reception of serial data is
synchronized and takes place at the same time, i.e. the same number of transmitted bits
is also received. Transmit data is written into the Transmit Buffer SSCTB. It is moved to
the shift register as soon as this is empty. An SSC-master (SSCMS=’1’) immediately
starts transmitting, while an SSC-slave (SSCMS=’0’) waits for an active shift clock.
Data Sheet
control bits;
flags.
Transmit Int. Request
Receive Int. Request
Clock
CPU
Error Int.Request
Synchronous Serial Channel SSC Block Diagram
Baud Rate
Generator
Register SSCTB
Transmit Buffer
I n t e r n a l B u s
Status
16-Bit Shift Register
SSC Control Block
274.
Control
Clock
Clock
117
Shift
Control
Register SSCRB
Receive Buffer
Master Clock
Slave Clock
Control
Pin
Multi Function Port (MFP)
MCB01957
SCLK
MTSR
MRST
PEB 20534
PEF 20534
2000-05-30
“SCC
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