isp1760 NXP Semiconductors, isp1760 Datasheet - Page 68

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isp1760

Manufacturer Part Number
isp1760
Description
Hi-speed Universal Serial Bus Host Controller For Embedded Applications
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
Table 69:
9397 750 13257
Product data sheet
Bit
62
61 to 58
57
56 to 55
54 to 47
46 to 32
DW2
31 to 24
23 to 8
7 to 0
DW1
63 to 47
46
45 to 44
43 to 42
Symbol
H
reserved
DT
Cerr[1:0]
reserved
NrBytes
Transferred
[14:0]
reserved
DataStart
Address
[15:0]
reserved
S
EPType[1:0]
Token[1:0]
High-speed interrupt IN and OUT, QHP: bit description
Frame[7:0]
Access
HW — writes
-
HW — writes
SW — writes
HW — writes
SW — writes
-
HW — writes
-
SW — writes
SW — writes
-
SW — writes
SW — writes
SW — writes
Description
Halt: Transaction is halted.
-
Data Toggle: Set the Data Toggle bit to start the PTD. Software writes the
current transaction toggle value. Hardware writes the next transaction toggle
value.
Error Counter. This field corresponds to the Cerr[1:0] field in the QH. The
default value of this field is zero for isochronous transactions.
-
Number of Bytes Transferred: This field indicates the number of bytes sent
or received for this transaction. If Mult[1:0] is greater than one, it is possible
to store intermediate results in this field.
-
Data Start Address: This is the start address for the data that will be sent or
received on or from the USB bus. This is the internal memory address and
not the direct CPU address.
RAM address = (CPU address
Bits 7 to 3 represent the polling rate for ms-based polling.
The INT polling rate is defined as 2
When b is 1, 2, 3 or 4, use SA to define polling because the rate is equal to
or less than 1 ms. Bits 7 to 3 are set to 0. Polling checks SA bits for SOF
rates.
-
This bit indicates if a split transaction has to be executed:
0 — High-speed transaction
1 — Split transaction.
Endpoint type:
11 — Interrupt.
Token: This field indicates the token PID for this transaction:
00 — OUT
01 — IN.
Rev. 01 — 8 November 2004
b
1
2
3
4
5
6
7
8
9
1 SOF
2 SOF
4 SOF
16 ms
32 ms
1 ms
2 ms
4 ms
8 ms
rate
…continued
Embedded Hi-Speed USB host controller
400h)/8
10000 to 11111
1000 to 1111
(b – 1)
100 to 111
Frame[7:3]
10 to 11
0
0
0
0
1
SOF, where b is 1 to 9.
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
10101010 or 01010101
any 2 bits set
ISP1760
any 1 bit set
any 1 bit set
any 1 bit set
any 1 bit set
any 1 bit set
any 1 bit set
11111111
SA[7:0]
68 of 105

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