isp1760 NXP Semiconductors, isp1760 Datasheet - Page 60

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isp1760

Manufacturer Part Number
isp1760
Description
Hi-speed Universal Serial Bus Host Controller For Embedded Applications
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
Table 65:
9397 750 13257
Product data sheet
Bit
46 to 32
DW2
31 to 29
28 to 25
24
23 to 8
7 to 0
DW1
63 to 47
46
45 to 44
43 to 42
41 to 35
34 to 32
DW0
31
30 to 29
High-speed bulk IN and OUT, QHA: bit description
Symbol
NrBytesTransferred
[14:0]
reserved
RL[3:0]
reserved
DataStartAddress
[15:0]
reserved
reserved
S
EPType[1:0]
Token[1:0]
DeviceAddress[6:0] SW — writes
EndPt[3:1]
EndPt[0]
Mult[1:0]
Access
HW — writes
SW — writes
0000
-
SW — writes
-
SW — writes
-
-
SW — writes
SW — writes
SW — writes
SW — writes
SW — writes
SW — writes
Rev. 01 — 8 November 2004
Description
Number of Bytes Transferred: This field indicates the number of
bytes sent or received for this transaction. If Mult[1:0] is greater than
one, it is possible to store intermediate results in this field.
Set to 0 for QHA.
Reload: If RL is set to 0h, hardware ignores the NakCnt value. RL and
NakCnt are set to the same value before a transaction.
Always 0 for QHA.
Data Start Address: This is the start address for the data that will be
sent or received on or from the USB bus. This is the internal memory
address and not the direct CPU address.
RAM address = (CPU address
-
Always 0 for QHA.
This bit indicates whether a split transaction has to be executed:
0 — High-speed transaction
1 — Split transaction.
Transaction type:
00 — Control
10 — Bulk.
Token: Identifies the token Packet Identifier (PID) for this transaction:
00 — OUT
01 — IN
10 — SETUP
11 — PING (written by hardware only).
Device Address: This is the USB address of the function containing
the endpoint that is referred to by this buffer.
Endpoint: This is the USB address of the endpoint within the function.
Endpoint: This is the USB address of the endpoint within the function.
Multiplier: This field is a multiplier used by the Host Controller as the
number of successive packets the Host Controller may submit to the
endpoint in the current execution.
For QHA, this is a copy of the Async Schedule Park mode count, if the
Async Schedule Park mode is enabled. These EHCI registers need to
be set to reflect multiple cycles. Applicable for high-speed only.
Set this field to 01b. You can also set it to 11b and 10b depending on
your application. 00b is undefined.
…continued
Embedded Hi-Speed USB host controller
400h)/8
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
ISP1760
60 of 105

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