isp1760 NXP Semiconductors, isp1760 Datasheet - Page 44

• Manufacturer Part Number: isp1760
• Description: Hi-speed Universal Serial Bus Host Controller For Embedded Applications
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 44:
9397 750 13257
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Memory register: bit allocation
8.3.7 ATL Done Timeout register (R/W: 0338h)
8.3.8 Memory register (R/W: 033Ch)
R/W
R/W
31
23
0
0
Table 42:
The bit description of the ATL Done Timeout register is given in
Table 43:
The Memory register contains the base memory read address and the respective bank.
This register needs to be set only before a first memory read cycle. Once written, the
address will be latched for the bank and will be incremented for every read of that bank,
until a new address for that bank is written to change the address pointer.
The bit description of the register is given in
Bit
31 to 3
2
1
0
Bit
31 to 0
R/W
R/W
30
22
0
0
Symbol
ATL_DONE
_TIMEOUT
[31:0]
Buffer Status register: bit description
ATL Done Timeout register: bit description
Symbol
-
ISO_BUF_
FILL
INT_BUF_
FILL
ATL_BUF_
FILL
R/W
R/W
29
21
0
0
Rev. 01 — 8 November 2004
Access Value
R/W
reserved
Description
reserved
ISO Buffer Filled:
1 — Indicates one of the ISO PTDs is filled, and the ISO PTD area will
be processed
0 — Indicates there is no PTD in this area. Therefore, processing of
the ISO PTDs will be completely skipped.
INT Buffer Filled:
1 — Indicates one of the INT PTDs is filled, and the INT PTD area will
be processed
0 — Indicates there is no PTD in this area. Therefore, processing of
the INT PTDs will be completely skipped.
ATL Buffer Filled:
1 — Indicates one of the ATL PTDs is filled, and the ATL PTD area will
be processed
0 — Indicates there is no PTD in this area. Therefore, processing of
the ATL PTDs will be completely skipped.
[1]
0000 0000h ATL Done Timeout: This register determines the
R/W
R/W
28
20
0
0
reserved
[1]
Description
ATL done timeout interrupt. This register defines
the timeout in ms after which the ISP1760 asserts
the INT line, if enabled. It is applicable to the ATL
done PTDs only.
R/W
R/W
Table
27
19
0
0
Embedded Hi-Speed USB host controller
44.
R/W
R/W
26
18
0
0
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Table
MEM_BANK_SEL[1:0]
R/W
R/W
43.
25
17
0
0
ISP1760
R/W
R/W
44 of 105
24
16
0
0