isp1705 NXP Semiconductors, isp1705 Datasheet - Page 86

• Manufacturer Part Number: isp1705
• Description: Ulpi Hi-speed Usb Transceiver
• Manufacturer: NXP Semiconductors

NXP Semiconductors
25. Tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10. ULPI signal description . . . . . . . . . . . . . . . . . .23
Table 11. Signal mapping during low-power mode . . . . .24
Table 12. Signal mapping for 6-pin serial mode . . . . . . .25
Table 13. Signal mapping for 3-pin serial mode . . . . . . .26
Table 14. UART signal mapping . . . . . . . . . . . . . . . . . . .26
Table 15. Operating states and their corresponding
Table 16. TXCMD byte format . . . . . . . . . . . . . . . . . . . . .31
Table 17. RXCMD byte format . . . . . . . . . . . . . . . . . . . . .32
Table 18. LINESTATE[1:0] encoding for upstream
Table 19. LINESTATE[1:0] encoding for downstream
Table 20. Encoded V
Table 21. V
Table 22. Encoded USB event signals . . . . . . . . . . . . . .35
Table 23. PHY pipeline delays . . . . . . . . . . . . . . . . . . . . .39
Table 24. Link decision times . . . . . . . . . . . . . . . . . . . . .40
Table 25. Register map . . . . . . . . . . . . . . . . . . . . . . . . . .52
Table 26. VENDOR_ID_LOW - Vendor ID low register
Table 27. VENDOR_ID_HIGH - Vendor ID high
Table 28. PRODUCT_ID_LOW - Product ID low
Table 29. PRODUCT_ID_HIGH - Product ID high
Table 30. FUNC_CTRL - Function control register
Table 31. FUNC_CTRL - Function control register
Table 32. INTF_CTRL - Interface control register
ISP1705_1
Product data sheet
Ordering information . . . . . . . . . . . . . . . . . . . . .3
Marking codes . . . . . . . . . . . . . . . . . . . . . . . . . .3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . .6
Recommended V
OTG_CTRL register power control bits . . . . . .19
Allowed crystal or clock frequency on the
XTAL1 pin . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
External capacitor values for 13 MHz or
19.2 MHz clock frequency . . . . . . . . . . . . . . . .20
External capacitor values for 24 MHz or
26 MHz clock frequency . . . . . . . . . . . . . . . . .20
Pin states in Power-down mode . . . . . . . . . . .22
resistor settings . . . . . . . . . . . . . . . . . . . . . . . .29
facing ports: peripheral . . . . . . . . . . . . . . . . . .33
facing ports: host . . . . . . . . . . . . . . . . . . . . . . .33
typical applications . . . . . . . . . . . . . . . . . . . . . .34
(address R = 00h) bit description . . . . . . . . . . .52
register (address R = 01h) bit description . . . .52
register (address R = 02h) bit description . . . .53
register (address R = 03h) bit description . . . .53
(address R = 04h to 06h, W = 04h, S = 05h,
C = 06h) bit allocation . . . . . . . . . . . . . . . . . . .53
(address R = 04h to 06h, W = 04h, S = 05h,
C = 06h) bit description . . . . . . . . . . . . . . . . . .53
(address R = 07h to 09h, W = 07h, S = 08h,
BUS
indicators in RXCMD required for
BUS
voltage state . . . . . . . . . . . . . .33
BUS
capacitor value . . . . . . .18
Rev. 01 — 13 June 2008
Table 33. INTF_CTRL - Interface control register
Table 34. OTG_CTRL - OTG control register
Table 35. OTG_CTRL - OTG control register
Table 36. USB_INTR_EN_R - USB interrupt enable
Table 37. USB_INTR_EN_R - USB interrupt enable
Table 38. USB_INTR_EN_F - USB interrupt enable
Table 39. USB_INTR_EN_F - USB interrupt enable
Table 40. USB_INTR_STAT - USB interrupt status
Table 41. USB_INTR_STAT - USB interrupt status
Table 42. USB_INTR_L - USB interrupt latch
Table 43. USB_INTR_L - USB interrupt latch
Table 44. DEBUG - Debug register (address R = 15h)
Table 45. DEBUG - Debug register (address R = 15h)
Table 46. SCRATCH - Scratch register (address
Table 47. CARKIT_CTRL - Carkit control register
Table 48. CARKIT_CTRL - Carkit control register
Table 49. PWR_CTRL - Power control register
Table 50. PWR_CTRL - Power control register
C = 09h) bit allocation . . . . . . . . . . . . . . . . . . . 55
(address R = 07h to 09h, W = 07h, S = 08h,
C = 09h) bit description . . . . . . . . . . . . . . . . . . 55
(address R = 0Ah to 0Ch, W = 0Ah, S = 0Bh,
C = 0Ch) bit allocation . . . . . . . . . . . . . . . . . . . 56
(address R = 0Ah to 0Ch, W = 0Ah, S = 0Bh,
C = 0Ch) bit description . . . . . . . . . . . . . . . . . 57
rising register (address R = 0Dh to 0Fh,
W = 0Dh, S = 0Eh, C = 0Fh) bit allocation . . . 58
rising register (address R = 0Dh to 0Fh,
W = 0Dh, S = 0Eh, C = 0Fh) bit description . . 58
falling register (address R = 10h to 12h,
W = 10h, S = 11h, C = 12h) bit allocation . . . . 58
falling register (address R = 10h to 12h,
W = 10h, S = 11h, C = 12h) bit description . . . 59
register (address R = 13h) bit allocation . . . . . 59
register (address R = 13h) bit description . . . . 59
register (address R = 14h) bit allocation . . . . . 60
register (address R = 14h) bit description . . . . 60
bit allocation . . . . . . . . . . . . . . . . . . . . . . . . . . 60
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 60
R = 16h to 18h, W = 16h, S = 17h, C = 18h)
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 61
(address R = 19h to 1Bh, W = 19h, S = 1Ah,
C = 1Bh) bit allocation . . . . . . . . . . . . . . . . . . . 61
(address R = 19h to 1Bh, W = 19h, S = 1Ah,
C = 1Bh) bit description . . . . . . . . . . . . . . . . . . 61
(address R = 3Dh to 3Fh, W = 3Dh, S = 3Eh,
C = 3Fh) bit allocation . . . . . . . . . . . . . . . . . . . 62
(address R = 3Dh to 3Fh, W = 3Dh, S = 3Eh,
ULPI Hi-Speed USB transceiver
© NXP B.V. 2008. All rights reserved.
ISP1705
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