isp1181 NXP Semiconductors, isp1181 Datasheet - Page 55

• Manufacturer Part Number: isp1181
• Description: Isp1181 Full-speed Universal Serial Bus Interface Device
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 59:
[1]
[2]
9397 750 08938
Product data
Symbol
Write command + write data (see
T
T
T
Write command + read data (see
T
T
T
Fig 21. ALE timing.
Fig 22. Write command + write data cycle timing.
cy(WC-WD)
cy(WD-WD)
cy(WD-WC)
cy(WC-RD)
cy(RD-RD)
cy(RD-WC)
If the access cycle time is less than specified, the READY signal will be LOW until the internal processing has finished.
Commands Acknowledge Setup, Clear Buffer, Validate Buffer and Write Endpoint Configuration require 180 ns to complete.
Dynamic characteristics: access cycle timing
DATA
ALE
AD
Parameter
cycle time for write command,
then write data
cycle time for write data
cycle time for write data, then
write command
cycle time for write command,
then read data
cycle time for read data
cycle time for read data, then
write command
DATA
WR
CS
19.3 Access cycle timing
command
Figure 24
Figure 22
and
and
Conditions
Rev. 04 — 30 October 2001
Figure
T cy(WC-WD)
Figure
t LH
t AVLL
25)
23)
A0
t LLAX
data
Min
100
90
90
100
90
90
[2]
[2]
[1]
8-bit bus
T cy(WD-WD)
Max
-
-
-
-
-
-
D0
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
data
Min
205
205
205
205
205
205
Full-speed USB interface
[1]
16-bit bus
MGT022
Max
-
-
-
-
-
-
ISP1181
MGS790
Unit
ns
ns
ns
ns
ns
ns
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