adav801 Analog Devices, Inc., adav801 Datasheet - Page 52

• Manufacturer Part Number: adav801
• Description: Audio Codec For Recordable Dvd
• Manufacturer: Analog Devices, Inc.

ADAV801
PLL Control Register 1—Address 1110100 (0x74)
Table 128. PLL Control Register 1 Bit Map
7
DIRIN_CLK1
Table 129. PLL Control Register 1 Bit Descriptions
Bit Name
DIRIN_CLK[1:0]
MCLKODIV
PLLDIV
PLL2PD
PLL1PD
XTLPD
SYSCLK3
6
DIRIN_CLK0
Description
Recovered S/PDIF clock sent to SYSCLK3.
Divide input MCLK by 2 to generate MCLKO.
Divide XIN by 2 to generate the PLL master clock.
Power-down PLL2.
Power-down PLL1.
Power-down XTAL oscillator.
Clock output for SYSCLK3.
00 = SYSCLK3 comes from PLL block.
01 = Reserved.
10 = Reserved.
11 = SYSCLK3 is the recovered S/PDIF clock from DIRIN.
0 = Disabled.
1 = Enabled.
0 = Disabled.
1 = Enabled.
0 = Normal.
1 = Power-down.
0 = Normal.
1 = Power-down.
0 = Normal.
1 = Power-down.
0 = 512 × f
1 = 256 × f
5
MCLKODIV
S
S
.
.
4
PLLDIV
Rev. A | Page 52 of 60
3
PLL2PD
2
PLL1PD
1
XTLPD
0
SYSCLK3