adau1361 Analog Devices, Inc., adau1361 Datasheet - Page 38

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adau1361

Manufacturer Part Number
adau1361
Description
Stereo, Low Power, 96 Khz, 24-bit Audio Codec With Integrated Pll
Manufacturer
Analog Devices, Inc.
Datasheet

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ADAU1361
I
Figure 49 shows the format of a single-word write operation.
Every ninth clock pulse, the ADAU1361 issues an acknowledge
by pulling SDA low.
Figure 50 shows the format of a burst mode write sequence. This
figure shows an example of a write to sequential single-byte
re
after every byte because the requested subaddress corresponds
to a register or memory area with a 1-byte word length.
Figure 51 shows the format of a single-word read operation.
Note that the first R/ W
This is because the subaddress still needs to be written to set up
the internal address. After the ADAU1361 acknowledges the
receipt of the subaddress, the master must issue a repeated start
command followed by the chip address byte with the R/ W bit
S
S
S
S
2
C Read and Write Operations
gisters. The ADAU1361 increments its subaddress register
Chip address,
R/W = 0
Chip address,
R/W = 0
Chip address,
R/W = 0
Chip address,
R/W
= 0
AS
AS
bit is 0, indicating a write operation.
AS
Subaddress
high
Subaddress
high
Subaddress high
AS
Subaddress high
AS
AS
Subaddress
low
Subaddress
low
AS
Figure 49. Single-Word I C Write Format
Figure 51. Single-Word I
Figure 50. Burst Mode I
Figure 52. Burst Mode I
Subaddress low
Rev. 0 | Page 38 of 80
AS
AS
Data
Byte 1
AS
S
2
2
2
2
C Write Format
C Read Format
C Read Format
Chip address,
R/W = 1
set to 1 (read). This causes the ADAU1361 SDA to reverse and
begin driving data back to the master. The master then responds
every ninth pulse with an acknowledge pulse to the ADAU13
Figure 52 sh
fi
registers. The ADAU1361 increments its subaddress register
after every byte because the requested subaddress corresponds
to a register or memory area with a 1-byte word length. The
ADAU1361 always decodes the subaddress and sets the auto-
increment circuit so that the address increments after the
appropriate number of bytes.
Figure 49 to Figure 52 use the following abbreviations:
S = start bit
P = stop bit
AM = acknowledge by master
AS = acknowledge by slave
gure shows an example of a read from sequential single-byte
Subaddress low
AS
AS
Data
Byte 2
ows the format of a burst mode read sequence. This
S
AS
AS
Data
Byte 1
Chip address,
R/W = 1
Data
Byte 3
AS
AM
AS
Data Byte 1
Data
Byte 2
AS
Data
Byte 4
Data
Byte 1
AM
AS
P
61.
P
P
P

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