adau1361 Analog Devices, Inc., adau1361 Datasheet - Page 37

• Manufacturer Part Number: adau1361
• Description: Stereo, Low Power, 96 Khz, 24-bit Audio Codec With Integrated Pll
• Manufacturer: Analog Devices, Inc.

If the user exceeds the highes
mode, one of two actions is taken. In read mode, the ADAU
outputs the highest subaddress register contents until the ma
de ce issues a no
no cknowledge co
low on the ninth clock pulse on SCL. If the highest subaddr
vi
a
(CONTINUE
(CONTINUED)
(CONTINUED)
(CONTINUED)
(CONTINUED)
(CONTINUED)
START BY
MASTER
SDA
SCL
START BY
MASTER
SDA
SC
SDA
SDA
SDA
SCL
SCL
SCL
D)
L
acknowledge, indicating the end of a read. A
ndition is where the SDA line is not pulled
0
t subaddress while in autoincrement
1
SUBADDRESS BYTE 2
CHIP ADDRESS
READ DATA BYTE 1
1
CHIP ADDRESS BYTE
SUBADDRESS BYTE 2
FRAME 1
FRAME 3
FRAME 5
1
FRAME 1
FRAME 2
ADDR1
BYTE
0
ADDR1
Figure 48. I
ADDR0
Figure 47. I
ADDR0
R/W
1361
ster
ess
ADAU1361
2
C Read from AD
2
Rev. 0 | Page 37 of 80
ADAU1361
MAST
R/
C W
ACK
ACK BY
W
ACK BY
ADAU1361
ADAU1361
rite to ADA
BY
ACK BY
ACK BY
ER
STO
MAST
P BY
AU1361 Clocking
U1361 Clocking
location is reached while in write mode, the data for the invalid
byte is not loaded into any subaddress register, a no acknowledge
is issued by the ADAU1361, and the part returns to the idle
condi on.
REPEATED
START BY MASTER
ER
ti
SUBADDRESS BYTE 1
SUBADDRESS BYTE 1
FRAME 2
CHIP ADDRESS BYTE
DATA BYTE 1
FRAME 3
FRAME 2
FRAME 4
ADDR1
ADAU1361
ADDR0
ACK BY
ADAU1361
ADAU1361
ACK BY
ACK BY
R/W
ADAU1361
ADAU1361
ACK BY
ST
MASTER
OP BY