adau1361 Analog Devices, Inc., adau1361 Datasheet - Page 31

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adau1361

Manufacturer Part Number
adau1361
Description
Stereo, Low Power, 96 Khz, 24-bit Audio Codec With Integrated Pll
Manufacturer
Analog Devices, Inc.
Datasheet

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OUTPUT
NOISE GATE FUN
When using the ALC, on
input signals, the PGA gain can become very large. A side effec
of this is that the noise is amplified along with the signal of
interest. To avoid this situation, the ADAU1361 noise gate can
be used. The
level is below a set threshold. The noise gate is controlled using
the following parameters in the ALC Control 3 register
(Address 0x4014):
One common problem with noise gate functions is chatter,
where a small signal that is close to the noise gate threshold
varies in amplitude, causing the noise gate function to open and
close rapidly. This causes an unpleasant sound.
To reduce this effect, the noise gate in the ADAU1361 uses a
combination of a timeout period and hysteresis. The timeout
period is set to 250 ms, so the signal must consistently be below
INPUT
TARGET
GAIN
NGTYP[1:0]: The noise gate type is set to one of four
modes by writing to the NGTYP[
NGEN: The noise gate function is enabled by writing
NGEN bit.
NGTHR[4:0]: The threshold for muting the output is set by
writing to the NGTHR[4:0] bits.
Figure 37. Effect of Varying the Maximum Gain Parameter
noise gate cuts off the ADC output when its signal
MAX GAIN = 30dB
Figure 36. Basic ALC Operation
HOLD
TIME
CTION
MAX
e potential problem is that for small
DECAY
TIME
INPUT LEVEL (dB)
GAIN = 24dB
MAX GAIN = 18dB
1:0] bits.
ATTACK
TIME
GAIN POINT
MIN PGA
to the
Rev. 0 | Page 31 of 80
t
the threshold for 250 ms before the noise gate operates.
Hy
mute state is 6 dB higher than the threshold for going into th
mute state. There are four operating modes for the noise gate
Noise Gate Mode 0 (see Figure 38) is selected by setting the
NGTYP[1:0] bits to 00. In this mode, the current state of the
PGA gain is held at its current state when the noise gate logic is
activated. This prevents a large increase in background noise
during periods of silence. When using this mode, it is advisab
to use a relatively slow decay time. This is because the noise g
takes at least 250 ms to activate, and if the PGA gain has already
increased to a large value during this time, the value at which
the gain is held will be large.
ENAB
No se Gate Mode 1 (see Figure 39) is selected by setting the
NGT
simp
com
abru
ENABLE SIGNAL
steresis is used so that the threshold for coming out of the
N
i
NOISE GATE
OISE GATE
LE SIGNAL
pletely eliminates any background noise, the effect of an
INTERNAL
pt mute may not be pleasant to the ear.
INTERNAL
le digital mute of the ADC output. Although this mode
YP[1:0] bits to 01. In this mode, the ADAU1361 does a
ANALOG
OUTPUT
ANALOG
DIGITAL
OUTPUT
DIGITAL
INPUT
MUTE
INPUT
MUTE
GAIN
GAIN
Figure 38. Noise Gate Mode 0
Figure 39. Noise Gate Mode 1 (Digital Mute)
250ms
250ms
THRESHOLD
THRES
(PGA Gain Hold)
GAIN HELD
HOLD
ADAU1361
e
.
ate
le

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