mpc82l54 Megawin Technology, mpc82l54 Datasheet - Page 49

• Manufacturer Part Number: mpc82l54
• Description: 8-bit Micro-controller
• Manufacturer: Megawin Technology

MEGAWIN
There are two extra SFRs make relation with SPI application.
SFR: SPIDAT (SPI Data register)
SFR: SPISTAT (SPI Status register)
Configure the device to Master/Slave mode
The SFR SPIDAT holds the data to be transmitted or the data received.
SPEN SSIG
SPIF: = SPI transfer completion flag.
WCOL: = SPI Write Collision flag
0
1
1
1
1
1
1
SPIF
Bit-7
Bit-7
{1,0}: =
{1,1}: =
X
0
0
0
0
1
1
When a serial transfer finishes, the SPIF bit is set and an interrupt is generated if both the
ESPI (IE.5) bit and the EA (IE.7) bit are set. If SS is an input and is driven low when SPI is
in master mode with SSIG=0, SPIF will also be set to signal the “mode change”. The SPIF
is cleared in software by “writing 1 to this bit”.
Set the clock rate of the SPI as the frequency of the clock source over 64.
Set the clock rate of the SPI as the frequency of the clock source over 128.
The WCOL bit is set if the SPI data register SPIDAT is written during a data transfer. The
WCOL flag is cleared in software by “writing 1 to this bit”.
WCOL
SS
Bit-6
Bit-6
X
X
X
0
1
0
1
MSTR
1→0 slave
X
0
0
1
0
1
Bit-5
Bit-5
SPI disable
Active Salve
InActive Slave Hi-Z
Master
Master
Slave
Data to be transmitted or Data received
-
MPC82x54A Data Sheet
Mode
Bit-4
Bit-4
-
output input
output input
input
output input
input
GPI/O GPI/O GPI/O
MISO MOSI SPICLK
Bit-3
Bit-3
input
output output
output output
-
input
input
input
input
Bit-2
Bit-2
-
SPI is disabled.
Not selected.
SPICLK depends on CPOL
Slave
Master
Selected as slave
Convert from Master to Slave
Bit-1
Bit-1
-
Remark
Bit-0
Bit-0
-
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