mpc850de Freescale Semiconductor, Inc, mpc850de Datasheet - Page 44

• Manufacturer Part Number: mpc850de
• Description: Mpc850 Rev. A/b/c Communications Controller
• Manufacturer: Freescale Semiconductor, Inc

Serial Interface AC Electrical Specifications
44
1
2
3
4
Num
The ratio SyncCLK/L1RCLK must be greater than 2.5/1.
These specs are valid for IDL mode only.
Where P = 1/CLKOUT. Thus for a 25-MHz CLKO1 rate, P = 40 ns.
These strobes and TxD on the first bit of the frame become valid after L1CLK edge or L1SYNC,
whichever is later.
78A
80A
83A
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
(SYNC hold time)
L1RSYNC, L1TSYNC rise/fall time
L1RXD valid to L1xCLK edge (L1RXD setup time)
L1xCLK edge to L1RXD invalid (L1RXD hold time)
L1xCLK edge to L1STn valid
L1SYNC valid to L1STn valid
L1xCLK edge to L1STn invalid
L1xCLK edge to L1TXD valid
L1TSYNC valid to L1TXD valid
L1xCLK edge to L1TXD high impedance
L1RCLK, L1TCLK frequency (DSC =1)
L1RCLK, L1TCLK width low (DSC =1)
L1RCLK, L1TCLK width high (DSC = 1)
L1CLK edge to L1CLKO valid (DSC = 1)
L1RQ valid before falling edge of L1TSYNC
L1GR setup time
L1GR hold time
L1xCLK edge to L1SYNC valid (FSD = 00) CNT =
0000, BYT = 0, DSC = 0)
L1xCLK edge to L1RSYNC, L1TSYNC, invalid
MPC850 (Rev. A/B/C) Hardware Specifications
2
Characteristic
Table 17. SI Timing (continued)
4
4
3
4
P + 10
P + 10
35.00
17.00
13.00
10.00
10.00
10.00
10.00
10.00
42.00
42.00
0.00
1.00
Min
—
—
—
—
All Frequencies
SYNCCLK/2
16.00 or
15.00
45.00
45.00
45.00
55.00
55.00
42.00
30.00
Max
0.00
—
—
—
—
—
—
—
—
L1TCLK
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MOTOROLA