mc68hc05pl4b Freescale Semiconductor, Inc, mc68hc05pl4b Datasheet - Page 70

• Manufacturer Part Number: mc68hc05pl4b
• Description: Low-cost Single-chip Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

GENERAL RELEASE SPECIFICATION
12.1.3 Direct
12.1.4 Extended
12.1.5 Indexed, No Offset
12.1.6 Indexed, 8-Bit Offset
12-2
Direct instructions can access any of the rst 256 memor y addresses with two
bytes. The rst b yte is the opcode, and the second is the low byte of the operand
address. In direct addressing, the CPU automatically uses $00 as the high byte of
the operand address. BRSET and BRCLR are three-byte instructions that use
direct addressing to access the operand and relative addressing to specify a
branch destination.
Extended instructions use only three bytes to access any address in memory. The
the operand address.
When using the Freescale assembler, the programmer does not need to specify
whether an instruction is direct or extended. The assembler automatically selects
the shortest form of the instruction.
Indexed instructions with no offset are one-byte instructions that can access data
with variable addresses within the rst 256 memor y locations. The index register
contains the low byte of the conditional address of the operand. The CPU
automatically uses $00 as the high byte, so these instructions can address
locations $0000–$00FF.
Indexed, no offset instructions are often used to move a pointer through a table or
to hold the address of a frequently used RAM or I/O location.
Indexed, 8-bit offset instructions are two-byte instructions that can access data
with variable addresses within the rst 511 memor y locations. The CPU adds the
unsigned byte in the index register to the unsigned byte following the opcode. The
sum is the conditional address of the operand. These instructions can access
locations $0000–$01FE.
Indexed 8-bit offset instructions are useful for selecting the kth element in an
n-element table. The table can begin anywhere within the
locations and could extend as far as location 510 ($01FE). The k value is typically
in the index register, and the address of the beginning of the table is in the byte
following the opcode.
rst b yte is the opcode; the second and third bytes are the high and low bytes of
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INSTRUCTION SET
April 30, 1998
rst 256 memory
MC68HC05PL4
REV 2.0