mc68hc05pl4b Freescale Semiconductor, Inc, mc68hc05pl4b Datasheet - Page 60

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mc68hc05pl4b

Manufacturer Part Number
mc68hc05pl4b
Description
Low-cost Single-chip Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
GENERAL RELEASE SPECIFICATION
9.6
9-10
TCMPEN - TIMER OUTPUT COMPARE ENABLE
TIMER STATUS REGISTER (TSR)
The timer status register (TSR) shown in Figure 9-12 contains ags f or the follow-
ing events:
Writing to any of the bits in the TSR has no effect. Reset does not change the
state of any of the ag bits in the TSR.
ICF - INPUT CAPTURE FLAG
OCF - OUTPUT COMPARE FLAG
TOF - TIMER OVERFLOW FLAG
TSR
$0013
U = UNAFFECTED BY RESET
The bit con gures por t pin PA3 for Timer16 output compare function (TCMP).
At power-on-reset, this bit is cleared, PA3 is a standard I/O port pin, TCMP sig-
nal to PA3 is disabled from Timer16.
The ICF bit is automatically set when an edge of the selected polarity occurs on
the PA2/TCAP pin. Clear the ICF bit by reading the timer status register with
the ICF set, and then reading the low byte (ICRL, $0015) of the input capture
registers. Resets have no effect on ICF.
The OCF bit is automatically set when the value of the timer registers matches
the contents of the output compare registers. Clear the OCF bit by reading the
timer status register with the OCF set, and then accessing the low byte (OCRL,
$0017) of the output compare registers. Resets have no effect on OCF.
The TOF bit is automatically set when the 16-bit timer counter rolls over from
$FFFF to $0000. Clear the TOF bit by reading the timer status register with the
TOF set, and then accessing the low byte (TMRL, $0019) of the timer registers.
Resets have no effect on TOF.
reset:
1 = PA3 pin con gured as TCMP for timer output compare
0 = PA3 pin as standard I/O port pin
An active signal on the PA2/TCAP pin transferring the contents of the
timer registers to the input capture registers.
A match between the 16-bit counter and the output compare registers,
transferring the OLVL bit to the TCMP.
An over o w of the timer registers from $FFFF to $0000.
W
R
BIT 7
ICF
U
Freescale Semiconductor, Inc.
Figure 9-12. Timer Status Registers (TSR)
For More Information On This Product,
BIT 6
OCF
16-BIT PROGRAMMABLE TIMER
U
Go to: www.freescale.com
BIT 5
TOF
April 30, 1998
U
BIT 4
0
0
BIT 3
0
0
BIT 2
0
0
BIT 1
0
0
MC68HC05PL4
REV 2.0
BIT 0
0
0

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