mc68hc05pl4b Freescale Semiconductor, Inc, mc68hc05pl4b Datasheet - Page 26

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mc68hc05pl4b

Manufacturer Part Number
mc68hc05pl4b
Description
Low-cost Single-chip Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
GENERAL RELEASE SPECIFICATION
4.2
4-2
If more than one interrupt request is pending, the CPU fetches the vector of the
higher priority interrupt rst. A higher priority interrupt does not actually interrupt a
lower priority interrupt service routine unless the lower priority interrupt service
routine clears the I bit.
INTERRUPT PROCESSING
The CPU does the following actions to begin servicing an interrupt:
The return from interrupt (RTI) instruction causes the CPU to recover its register
contents from the stack as shown in Figure 4-1. The sequence of events caused
by an interrupt is shown in the o w chart in Figure 4-2
Stores the CPU registers on the stack in the order shown in
Figure 4-1
Sets the I bit in the condition code register to prevent further interrupts
Loads the program counter with the contents of the appropriate interrupt
vector locations as shown in Table 4-1
$00BE
$00FD
$00BF
$00C0
$00C1
$00C2
$00FE
$00FF
$0020
$0021
n+1
n+2
n+3
n+4
n
Freescale Semiconductor, Inc.
Figure 4-1. Interrupt Stacking Order
For More Information On This Product,
Program Counter (High Byte)
Program Counter (Low Byte)
Condition Code Register
Top of Stack (RAM)
(Bottom of Stack)
(Bottom of RAM)
Index Register
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Accumulator
April 30, 1998
INTERRUPTS
NOTE
Stacking
Order
5
4
3
2
1
Unstacking
Order
1
2
3
4
5
MC68HC05PL4
REV 2.0

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